Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors

Author(s):  
Yang Ding ◽  
Mahmut Kandemir ◽  
Mary Jane Irwin ◽  
Padma Raghavan
2014 ◽  
Vol 13 (4) ◽  
pp. 1-36 ◽  
Author(s):  
Luis Angel D. Bathen ◽  
Nikil D. Dutt
Keyword(s):  

2021 ◽  
Vol 11 (2) ◽  
pp. 22
Author(s):  
Umberto Ferlito ◽  
Alfio Dario Grasso ◽  
Michele Vaiana ◽  
Giuseppe Bruno

Charge-Based Capacitance Measurement (CBCM) technique is a simple but effective technique for measuring capacitance values down to the attofarad level. However, when adopted for fully on-chip implementation, this technique suffers output offset caused by mismatches and process variations. This paper introduces a novel method that compensates the offset of a fully integrated differential CBCM electronic front-end. After a detailed theoretical analysis of the differential CBCM topology, we present and discuss a modified architecture that compensates mismatches and increases robustness against mismatches and process variations. The proposed circuit has been simulated using a standard 130-nm technology and shows a sensitivity of 1.3 mV/aF and a 20× reduction of the standard deviation of the differential output voltage as compared to the traditional solution.


2004 ◽  
Vol 32 (3) ◽  
pp. 11-18 ◽  
Author(s):  
Partha Kundu ◽  
Murali Annavaram ◽  
Trung Diep ◽  
John Shen

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