SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs

Author(s):  
Björn Osterloh ◽  
Harald Michalik ◽  
Björn Fiethe
Author(s):  
SHUBHANGI D CHAWADE ◽  
MAHENDRA A GAIKWAD ◽  
RAJENDRA M PATRIKAR

The Network-on-Chip (NoC) is Network-version of System-on-Chip (SoC) means that on-chip communication is done through packet based networks. In NOC topology, routing algorithm and switching are main terminology .The routing algorithm is one of the key factor in NOC architecture. The routing algorithm, which defines as the path taken by a packet between the source and the destination. As XY routing algorithm mainly used in NOC because of its simplicity. This paper basically review of XY routing algorithm in which we study a different type of XY routing algorithm . The classification of XY routing algorithm is totally depend upon the environment and requirement. Such that IX/Y routing algorithm is for less collision in network ,for deadlock-free and livelock-free DyXY is used, for fault-tolerant XYX routing algorithm is proposed and Adaptive XY routing algorithm is used for fully utilization of network resource.


Author(s):  
Björn Osterloh ◽  
Harald Michalik ◽  
Björn Fiethe

Today FPGAs with large gate counts provide a highly flexible platform to implement a complete System-on-Chip (SoC) in a single device. Specifically radiation tolerant space suitable SRAM-based FPGAs have significantly improved the flexibility of high reliable systems for space applications. Currently the reconfigurability of these devices is only used during development phase. A further enhancement would be using the reconfigurability of SRAM-FPGAs in space, either to statically update or dynamically reconfigure processing modules. This is a major improvement in terms of maintenance and performance, which is essential for scientific instruments in space. The requirement for this enhanced system is to guarantee the system qualification and retain the achieved high reliability. Therefore effects during the reconfiguration process and interference of updated modules on the system have to be prevented. Updated modules need to be isolated physically and logically by qualified communication architecture. In this chapter the advantage of a specialized Network-on-Chip architecture to achieve a high reliable SoC with dynamic reconfiguration capability is presented. The requirements for SoC based on SRAM-FPGA in high reliable applications are outlined. Additionally the influences of radiation induced particles are described and effects during the dynamic reconfiguration are discussed. A specialized Network-on-Chip architecture is then proposed and its advantages are presented.


2021 ◽  
Vol 125 ◽  
pp. 114346
Author(s):  
Douglas Almeida Santos ◽  
Lucas Matana Luza ◽  
Luigi Dilillo ◽  
Cesar Albenes Zeferino ◽  
Douglas Rossi Melo

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