CHARACTERIZATION OF CAPACITIVE COUPLING FOR ON-CHIP CIRCULAR STACKED INDUCTORS

2007 ◽  
Vol 27 (1) ◽  
pp. 79-90
Author(s):  
Xiao-Cha Liu ◽  
Ping Liu
Keyword(s):  
Capacitive Coupling ◽  
On Chip

scholarly journals RF Small and large signal characterization of a 3D integrated GaN/RF-SOI SPST switch

2021 ◽  
pp. 1-6
Author(s):  
Frédéric Drillet ◽  
Jérôme Loraine ◽  
Hassan Saleh ◽  
Imene Lahbib ◽  
Brice Grandchamp ◽  
...  
Keyword(s):  
Power Level ◽  
Coplanar Waveguide ◽  
Average Power ◽  
Input Power ◽  
Capacitive Coupling ◽  
Rf Switch ◽  
Large Signal ◽  
Waveguide Transmission ◽  
Signal Characterization

Abstract This paper presents the radio frequency (RF) measurements of an SPST switch realized in gallium nitride (GaN)/RF-SOI technology compared to its GaN/silicon (Si) equivalent. The samples are built with an innovative 3D heterogeneous integration technique. The RF switch transistors are GaN-based and the substrate is RF-SOI. The insertion loss obtained is below 0.4 dB up to 30 GHz while being 1 dB lower than its GaN/Si equivalent. This difference comes from the vertical capacitive coupling reduction of the transistor to the substrate. This reduction is estimated to 59% based on a RC network model fitted to S-parameters measurements. In large signal, the linearity study of the substrate through coplanar waveguide transmission line characterization shows the reduction of the average power level of H2 and H3 of 30 dB up to 38 dBm of input power. The large signal characterization of the SPST shows no compression up to 38 dBm and the H2 and H3 rejection levels at 38 dBm are respectively, 68 and 75 dBc.

scholarly journals Demonstration of an integrated nanophotonic chip-scale alkali vapor magnetometer using inverse design

2021 ◽  
Vol 10 (1) ◽  
Author(s):  
Yoel Sebbag ◽  
Eliran Talker ◽  
Alex Naiman ◽  
Yefim Barash ◽  
Uriel Levy
Keyword(s):  
Spatial Resolution ◽  
Near Field ◽  
Computer Assisted ◽  
Experimental Characterization ◽  
Optical Isolation ◽  
New Concepts ◽  
On Chip ◽  
The Cost ◽  
Micrometer Scale

AbstractRecently, there has been growing interest in the miniaturization and integration of atomic-based quantum technologies. In addition to the obvious advantages brought by such integration in facilitating mass production, reducing the footprint, and reducing the cost, the flexibility offered by on-chip integration enables the development of new concepts and capabilities. In particular, recent advanced techniques based on computer-assisted optimization algorithms enable the development of newly engineered photonic structures with unconventional functionalities. Taking this concept further, we hereby demonstrate the design, fabrication, and experimental characterization of an integrated nanophotonic-atomic chip magnetometer based on alkali vapor with a micrometer-scale spatial resolution and a magnetic sensitivity of 700 pT/√Hz. The presented platform paves the way for future applications using integrated photonic–atomic chips, including high-spatial-resolution magnetometry, near-field vectorial imaging, magnetically induced switching, and optical isolation.

On-Chip Characterization of Statistical Device Degradation

2014 ◽  
pp. 69-92
Author(s):  
Takashi Sato ◽  
Hiromitsu Awano
Keyword(s):  
On Chip

scholarly journals Systematic Characterization of Graphene ESD Interconnects for On-Chip ESD Protection

2016 ◽  
Vol 63 (8) ◽  
pp. 3205-3212 ◽  
Author(s):  
Qi Chen ◽  
Rui Ma ◽  
Wei Zhang ◽  
Fei Lu ◽  
Chenkun Wang ◽  
...  
Keyword(s):  
Esd Protection ◽  
On Chip

(Invited) On-Chip Characterization of Microcapsules Using a Capacitive Sensor for Microencapsulation and Single-Cell Analysis Applications

2021 ◽  
Vol MA2021-01 (60) ◽  
pp. 1603-1603
Author(s):  
Sajjad Janfaza ◽  
Seyedehhamideh Razavi ◽  
Arash Dalili ◽  
Mina Hoorfar
Keyword(s):  
Single Cell ◽  
Single Cell Analysis ◽  
Capacitive Sensor ◽  
Cell Analysis ◽  
On Chip

scholarly journals On-Chip Thermal Insulation Using Porous GaN

Proceedings ◽  
2018 ◽  
Vol 2 (13) ◽  
pp. 776 ◽  
Author(s):  
Bogdan F. Spiridon ◽  
Peter H. Griffin ◽  
John C. Jarman ◽  
Yingjun Liu ◽  
Tongtong Zhu ◽  
...  
Keyword(s):  
Thermal Insulation ◽  
High Speed ◽  
Thermal Characterization ◽  
Semiconductor Materials ◽  
3Ω Method ◽  
Theoretical Predictions ◽  
Order Of Magnitude ◽  
On Chip ◽  
Fundamental Requirement

This study focuses on the thermal characterization of porous gallium nitride (GaN) usingan extended 3ω method. Porous semiconductor materials provide a solution to the need for on-chipthermal insulation, a fundamental requirement for low-power, high-speed and high-accuracythermal sensors. Thermal insulation is especially important in GaN devices, due to the intrinsicallyhigh thermal conductivity of the material. The results show one order of magnitude reduction inthermal conductivity, from 130 W/mK to 10 W/mK, in line with theoretical predictions for porousmaterials. This achievement is encouraging in the quest for integrating sensors with opto-, powerandRF-electronics on a single GaN chip.

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