<p>The
reliability of embedded processors is one of the major concerns in
safety-critical applications. Reliability is particularly expressed within the
cache memories which are the largest part of new system on chips. Cache
memories are the most vulnerable parts of the embedded systems and can affect
the reliability drastically especially in deep transistor scaling. Therefore,
evaluating the cache vulnerability is crucial in the design of a reliable
system especially for safety-critical applications. It
has been shown that using the same cache sizes for different programs leads to
incompatible vulnerability patterns in them. According to the literature, most
of the related researches, have exploited identical cache sizes for different
programs in their reliability evaluations, while the cache reliability strictly
depends on the cache size and program behavior. Traditional attempts for
finding an appropriate cache size for different programs would need a huge
design space exploration. In this work, we have introduced a criterion for
determining the Effective Cache Size (ECS) for embedded processors which
considers the inherent programs’ reliability and performance properties.
According to the results, using the ECS for the representative benchmark
applications, the reliability would be increased 43x on average with acceptable
performance degradations (21% on average).</p>