Influence of moisture concentration and hydrophobic material on induced stress in FCBGA package under reflow

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Elwin Heng ◽  
Mohd Zulkifly Abdullah

Purpose This paper focuses on the fluid-structure interaction (FSI) analysis of moisture induced stress for the flip chip ball grid array (FCBGA) package with hydrophobic and hydrophilic materials during the reflow soldering process. The purpose of this paper is to analyze the influence of moisture concentration and FCBGA with hydrophobic material on induced pressure and stress in the package at varies times. Design/methodology/approach The present study analyzed the warpage deformation during the reflow process via visual inspection machine (complied to Joint Electron Device Engineering Council standard) and FSI simulation by using ANSYS/FLUENT package. The direct concentration approach is used to model moisture diffusion and ANSYS is used to predict the Von-Misses stress. Models of Test Vehicle 1 (similar to Xie et al., 2009b) and Test Vehicle 2 (FCBGA package) with the combination of hydrophobic and hydrophilic materials are performed. The simulation for different moisture concentrations with reflows process time has been conducted. Findings The results from the mechanical reliability study indicate that the FSI analysis is found to be in good agreement with the published study and acceptable agreement with the experimental result. The maximum Von-Misses stress induced by the moisture significantly increased on FCBGA with hydrophobic material compared to FCBGA with a hydrophilic material. The presence of hydrophobic material that hinders the moisture desorption process. The analysis also illustrated the moisture could very possibly reside in electronic packaging and developed beyond saturated vapor into superheated vapor or compressed liquid, which exposed electronic packaging to higher stresses. Practical implications The findings provide valuable guidelines and references to engineers and packaging designers during the reflow soldering process in the microelectronics industry. Originality/value Studies on the influence of moisture concentration and hydrophobic material are still limited and studies on FCBGA package warpage under reflow process involving the effect of hydrophobic and hydrophilic materials are rarely reported. Thus, this study is important to effectively bridge the research gap and yield appropriate guidelines in the microelectronics industry.

2016 ◽  
Vol 28 (2) ◽  
pp. 41-62 ◽  
Author(s):  
Chun Sean Lau ◽  
C.Y. Khor ◽  
D. Soares ◽  
J.C. Teixeira ◽  
M.Z. Abdullah

Purpose The purpose of the present study was to review the thermo-mechanical challenges of reflowed lead-free solder joints in surface mount components (SMCs). The topics of the review include challenges in modelling of the reflow soldering process, optimization and the future challenges in the reflow soldering process. Besides, the numerical approach of lead-free solder reliability is also discussed. Design/methodology/approach Lead-free reflow soldering is one of the most significant processes in the development of surface mount technology, especially toward the miniaturization of the advanced SMCs package. The challenges lead to more complex thermal responses when the PCB assembly passes through the reflow oven. The virtual modelling tools facilitate the modelling and simulation of the lead-free reflow process, which provide more data and clear visualization on the particular process. Findings With the growing trend of computer power and software capability, the multidisciplinary simulation, such as the temperature and thermal stress of lead-free SMCs, under the influenced of a specific process atmosphere can be provided. A simulation modelling technique for the thermal response and flow field prediction of a reflow process is cost-effective and has greatly helped the engineer to eliminate guesswork. Besides, simulated-based optimization methods of the reflow process have gained popularity because of them being economical and have reduced time-consumption, and these provide more information compared to the experimental hardware. The advantages and disadvantages of the simulation modelling in the reflow soldering process are also briefly discussed. Practical implications This literature review provides the engineers and researchers with a profound understanding of the thermo-mechanical challenges of reflowed lead-free solder joints in SMCs and the challenges of simulation modelling in the reflow process. Originality/value The unique challenges in solder joint reliability, and direction of future research in reflow process were identified to clarify the solutions to solve lead-free reliability issues in the electronics manufacturing industry.


2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Mohammad Hafifi Hafiz Ishak ◽  
Mohd Sharizal Abdul Aziz ◽  
Farzad Ismail ◽  
M.Z. Abdullah

Purpose The purpose of this paper is to present the experimental and simulation studies on the influence of copper pillar bump structure on flip chip packaging during reflow soldering. Design/methodology/approach In this work, solidification/melting modelling and volume of fluid modelling were used. Reflow soldering process of Cu pillar type FC was modelled using computational fluid dynamic software (FLUENT). The experimental results have been validated with the simulation results to prove the accuracy of the numerical method. Findings The findings of this study reveal that solder volume is the most important element influencing reflow soldering. The solder cap volume reduces as the Cu pillar bump diameter lowers, making the reflow process more difficult to establish a good solder union, as less solder is allowed to flow. Last but not least, the solder cap height for the reflow process must be optimized to enable proper solder joint formation. Practical implications This study provides a basis and insights into the impact of copper pillar bump structure on flip chip packaging during reflow soldering that will be advancing the future design of 3D stack package. This study also provides a superior visualization and knowledge of the melting and solidification phenomenon during the reflow soldering process. Originality/value The computational fluid dynamics analysis of copper pillar bump structure on flip chip packaging during reflow soldering is scant. To the authors’ best knowledge, no research has been concentrated on copper pillar bump size configurations in a thorough manner. Without the in-depth study, copper pillar bump size might have the impact of copper pillar bump structure on flip chip packaging during reflow soldering. Five design of parameter of flip chip IC package model was proposed for the investigation of copper pillar bump structure on flip chip packaging during reflow soldering.


2004 ◽  
Vol 1 (2) ◽  
pp. 17-25
Author(s):  
Ana C. Bueno ◽  
Maíra P. Shiki ◽  
Valdemir R. De Lima ◽  
Luis G. Brandão ◽  
Maurício M. Oka

The Six Sigma method using the DMAIC methodology is being applied for analyzing the reflow soldering process in an SMT assembly line. The Define phase (D) and Measure phase (M) were concluded, the Analysis (A) phase is being implemented, and the Improve (I) and Control (C) phases will be the next ones. Defects generated during the reflow process were classified and measured both on assembled memory modules and on virgin laminates that were passed through the oven during the reflow of these modules. Spots of solder and flux were found on the edge connector of the modules and also on the surface of the virgin laminates. It was found that these defects are generated inside the reflow oven, indicating that the oven is contaminated. Two solder pastes were analyzed and consequently, two temperature profiles were used. The amount of defects generated by the oven was found to be independent on the temperature profile. On the other hand the amount of defects depends on the solder paste that is used. The FMEA (Failure Mode and Effect Analysis) was also accomplished. As a result, the main failure modes of the reflow process were determined, namely, the heating rate, the soak temperature, the conveyor velocity, the reflow temperature, the reflow time, and the cooling rate.


2019 ◽  
Vol 31 (3) ◽  
pp. 146-156 ◽  
Author(s):  
Balázs Illés ◽  
Attila Géczy ◽  
Bálint Medgyes ◽  
Gábor Harsányi

Purpose This paper aims to present a review of the recent developments in vapour phase soldering (VPS) technology. This study focuses on the following topics: recent developments of the technology, i.e. soft and vacuum VPS; measurement and characterization methods of vapour space, i.e. temperature and pressure; numerical simulation of the VPS soldering process, i.e. condensate layer and solder joint formation; and quality and reliability studies of the solder joints prepared by VPS, i.e. void content and microstructure of the solder joints. Design/methodology/approach This study was written according to the results of a wide literature review about the substantial previous works in the past decade and according to the authors’ own results. Findings Up to now, a part of the electronics industry believes that the reflow soldering with VPS method is a significant alternative of convection and infrared technologies. The summarized results of the field in this study support this idea. Research limitations/implications This literature review provides engineers and researchers with understanding of the limitations and application possibilities of the VPS technology and the current challenges in soldering technology. Originality/value This paper summarizes the most important advantages and disadvantages of VPS technology compared to the other reflow soldering methods, as well as points out the necessary further developments and possible research directions.


2016 ◽  
Vol 28 (2) ◽  
pp. 101-113 ◽  
Author(s):  
Liming Chen ◽  
Enying Li ◽  
Hu Wang

Purpose Reflow soldering process is an important step of the surface mount technology. The purpose of this paper is to minimize the maximum warpage of shielding frame by controlling reflow soldering control parameters. Design/methodology/approach Compared with other reflow-related design methods, both time and temperate of each extracted time region are considered. Therefore, the number of design variable is increased. To solve the high-dimensional problem, a surrogate-assisted optimization (SAO) called adaptive Kriging high-dimensional representation model (HDMR) is used. Findings Therefore, the number of design variable is increased. To solve the high-dimensional problem, a surrogate-assisted optimization (SAO) called HDMR is used. The warpage of shield frame is significantly reduced. Moreover, the correlations of design variables are also disclosed. Originality/value Compared with the original Kriging HDMR, the expected improvement (EI) criterion is used and a new projection strategy is suggested to improve the efficiency of optimization method. The application suggests that the adaptive Kriging HDMR has potential capability to solve such complicated engineering problems.


2020 ◽  
Vol 33 (1) ◽  
pp. 9-17
Author(s):  
Mohd Najib Ali Mokhtar ◽  
M.Z. Abdullah ◽  
Abdullah Aziz Saad ◽  
Fakhrozi Cheani

Purpose This paper focuses on the reliability of the solder joint after the self-alignment phenomenon during reflow soldering. The aim of this study is to analyse the joint quality of the self-alignment assemblies of SnAg alloy solder joints with varying silver content. Design/methodology/approach The shear strength assessment was conducted in accordance with the JIS Z3 198-7 standard. The standard visual inspection of IPC-A-610G was also performed to inspect the self-alignment features of the solder joint samples. Statistical analysis was conducted to determine the probabilistic relationship of shear strength of the misalignment components. Findings The results from the mechanical reliability study indicate that there were decreasing trends in the shear strength value as misalignment offset increased. For shift mode configuration in the range of 0-300 µm, the resulting chip assembly inspection after the reflow process was in line with the IPC-A-610G standard. The statistical analysis shows that the solder type variation was insignificant to the shear strength of the chip resistor. The study concluded that the fracture occurred partially in the termination metallization at the lower part of the chip resistor. The copper content of the joint on that area shows that the crack occurred in the solder joint, and high silver content on the selected zone indicated that the fracture happened partially in the termination structure, as the termination structure of the lead-free chip resistor consists of an inner layer of silver and an outer layer of tin. Practical implications This study’s findings provide valuable guidelines and references to engineers and integrated circuit designers during the reflow soldering process in the microelectronics industry. Originality/value Studies on the effect of component misalignment on joint mechanical reliability are still limited, and studies on solder joint reliability involving the effect of differing contents of silver on varying chip component offset are rarely reported. Thus, this study is important to effectively bridge the research gap and yield appropriate guidelines in the potential industry.


2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Jianing Wang ◽  
Jieshi Chen ◽  
Zhiyuan Zhang ◽  
Peilei Zhang ◽  
Zhishui Yu ◽  
...  

Purpose The purpose of this article is the effect of doping minor Ni on the microstructure evolution of a Sn-xNi (x = 0, 0.05 and 0.1 wt.%)/Ni (Poly-crystal/Single-crystal abbreviated as PC Ni/SC Ni) solder joint during reflow and aging treatment. Results showed that the intermetallic compounds (IMCs) of the interfacial layer of Sn-xNi/PC Ni joints were Ni3Sn4 phase, while the IMCs of Sn-xNi/SC Ni joints were NiSn4 phase. After the reflow process and thermal aging of different joints, the growth behavior of interfacial layer was different due to the different mechanism of element diffusion of the two substrates. The PC Ni substrate mainly provided Ni atoms through grain boundary diffusion. The Ni3Sn4 phase of the Sn0.05Ni/PC Ni joint was finer, and the diffusion flux of Sn and Ni elements increased, so the Ni3Sn4 layer of this joint was the thickest. The SC Ni substrate mainly provided Ni atoms through the lattice diffusion. The Sn0.1Ni/SC Ni joint increases the number of Ni atoms at the interface due to the doping of 0.1Ni (wt.%) elements, so the joint had the thickest NiSn4 layer. Design/methodology/approach The effects of doping minor Ni on the microstructure evolution of an Sn-xNi (x = 0, 0.05 and 0.1 Wt.%)/Ni (Poly-crystal/Single-crystal abbreviated as PC Ni/SC Ni) solder joint during reflow and aging treatment was investigated in this study. Findings Results showed that the intermetallic compounds (IMCs) of the interfacial layer of Sn-xNi/PC Ni joints were Ni3Sn4 phase, while the IMCs of Sn-xNi/SC Ni joints were NiSn4 phase. After the reflow process and thermal aging of different joints, the growth behavior of the interfacial layer was different due to the different mechanisms of element diffusion of the two substrates. Originality/value In this study, the effect of doping Ni on the growth and formation mechanism of IMCs of the Sn-xNi/Ni (single-crystal) solder joints (x = 0, 0.05 and 0.1 Wt.%) was investigated.


2017 ◽  
Vol 29 (1) ◽  
pp. 28-33 ◽  
Author(s):  
Barbara Dziurdzia ◽  
Janusz Mikolajek

Purpose The purpose of this paper is to evaluate selected methods of reduction voidings in lead-free solder joints underneath thermal pads of light-emitting diodes (LEDs), using X-ray inspection and Six Sigma methodology. Design/methodology/approach On the basis of cause and effect diagram for solder voiding, the potential causes of voids and influence of process variables on void formation were found. Three process variables were chosen: the type of reflow soldering, vacuum incorporation and the type of solder paste. Samples of LEDs were mounted with convection and vapour phase reflow soldering. Vacuum was incorporated into vapour phase soldering. Two types of solder pastes OM338PT and LFS-216LT were used. Algorithm incorporated into X-ray inspection system enabled to calculate the statistical distribution of LED thermal pad coverage and to find the process capability index (Cpk) of applied soldering techniques. Findings The evaluation of selected soldering processes of LEDs in respect of their thermal pad coverage and statistical Cpk indices is presented. Vapour-phase soldering with vacuum is capable (Cpk > 1) for OM338PT and LFS-216LT paste. Convection reflow without vacuum with LFS-216LT paste is also capable (Cpk = 1.1). Other technological soldering processes require improvements. Vacuum improves radically the capability of a reflow soldering for an LED assembly. When vacuum is not accessible, some improvement of capability to a lower extent is possible by an application of void-free solder pastes. Originality/value Six Sigma statistical methodology combined with X-ray diagnosis was used to check whether applied methods of void reduction underneath LED thermal pads are capable processes.


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