scholarly journals A Compact Integration of a 77 GHz FMCW Radar System Using CMOS Transmitter and Receiver Adopting On-Chip Monopole Feeder

IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 6746-6757 ◽  
Author(s):  
Oh-Yun Kwon ◽  
Chenglin Cui ◽  
Jun-Seong Kim ◽  
Jae-Hyun Park ◽  
Reem Song ◽  
...  
2015 ◽  
Vol 63 (11) ◽  
pp. 3736-3746 ◽  
Author(s):  
Chenglin Cui ◽  
Seong-Kyun Kim ◽  
Reem Song ◽  
Jae-Hoon Song ◽  
Sangwook Nam ◽  
...  
Keyword(s):  
On Chip ◽  

Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1933
Author(s):  
Zhe Chen ◽  
Debin Hou ◽  
Ji-Xin Chen ◽  
Pinpin Yan ◽  
Lei Bao ◽  
...  

In this article, a fractional-N phase-locked loop (PLL) with integrated chirp generation circuit block for a 76~81 GHz frequency-modulated continuous-wave (FMCW) radar system is presented. Thanks to the switched inductor voltage-controlled oscillator (VCO) topology, the linearity, phase noise, chirp bandwidth, and chirp rate of the FMCW synthesizer can be optimized for the short-range radar (SRR) and long-range radar (LRR) applications, with switch at ON/OFF states, respectively, according to different requirements and concerns. In this way, the proposed FMCW synthesizer shows improved phase noise for switch OFF-state, good for LRR applications, compared to the conventional single-varactor VCOs or cap-bank VCOs. The switch loss at ON-state is further decreased with the Q-boosting technique, which helps the FMCW synthesizer to simultaneously obtain a wide chirp bandwidth, steep modulation rates and good phase noise for SRR applications. The FMCW synthesizer is fabricated in 0.13 µm SiGe BiCMOS technology, occupies an area of 1.7 × 1.9 mm2, and consumes 330 mW from a 3.3 V voltage supply. Measured results show that the FMCW synthesizer can cover 25.3~27 GHz (with a frequency tripler to fully cover 76~81 GHz band), showing optimized phase noise, chirp bandwidth, linearity, and modulation rates performance. The measured K-band phase noise is −110.5 dBc/Hz for switch OFF-state, and −106 dBc/Hz for switch ON-state at 1 MHz offset. The normalized root mean square (RMS) frequency error is 518 kHz for chirp rate of ±14.6 MHz/μs and 1.44 MHz for chirp rate of ±39 MHz/μs for the 77 GHz band. Moreover, the integrated waveform generator offers fully programmability in chirp rate, duration and bandwidth, which supports multi-slope chirp generations. With a frequency tripler, the chip is well suited for the 76~81 GHz FMCW radar system.


Author(s):  
Jingtao Liu ◽  
Changzhan Gu ◽  
Fan Zhang ◽  
Yueping Zhang ◽  
Jun-Fa Mao
Keyword(s):  

Author(s):  
Philipp Ritter

Abstract Next-generation automotive radar sensors are increasingly becoming sensitive to cost and size, which will leverage monolithically integrated radar system-on-Chips (SoC). This article discusses the challenges and the opportunities of the integration of the millimeter-wave frontend along with the digital backend. A 76–81 GHz radar SoC is presented as an evaluation vehicle for an automotive, fully depleted silicon-over-insulator 22 nm CMOS technology. It features a digitally controlled oscillator, 2-millimeter-wave transmit channels and receive channels, an analog base-band with analog-to-digital conversion as well as a digital signal processing unit with on-chip memory. The radar SoC evaluation chip is packaged and flip-chip mounted to a high frequency printed circuit board for functional demonstration and performance evaluation.


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