A SAW-Less Receiver Front-End Employing a Current-Mode RF Band-Pass Filter

Author(s):  
Jin Jin ◽  
Jianhui Wu ◽  
Chao Hua
2010 ◽  
Vol 19 (08) ◽  
pp. 1641-1650 ◽  
Author(s):  
FIRAT KAÇAR

A new tunable CMOS FDNR circuit is proposed. The circuit is based on the transcapacitive gyrator approach with both transcapacitive stages realized by MOS transistors configuration. This FDNR element lends itself well to the design of low-pass ladder filters and its use will result in a more efficient integrated circuit implementation than filters that simulate floating inductors utilizing resistive gyrators. The applications of FDNR to realize a current-mode fifth-order elliptic filter and current mode sixth-order elliptic band-pass filter are given. The proposed FDNR is simulated using CMOS TSMC 0.35 μm technology. Simulation results are given to confirm the theoretical analysis.


2006 ◽  
Vol 15 (06) ◽  
pp. 849-860 ◽  
Author(s):  
SAMIR BEN SALEM ◽  
DORRA SELLAMI MASMOUDI ◽  
MOURAD LOULOU

In this paper, we introduce an implementation of a CCII-based grounded inductance operating in class AB. In order to get tunable characteristics of the design, a translinear CCII configuration is used as a basic block for its high level of controllability. A frequency characterization of the translinear CCII is done. In order to optimize its static and dynamic characteristics, an algorithmic driven methodology is developed ending to the optimal transistor geometries. The optimized CCII has a current bandwidth of 1.28 GHz and a voltage bandwidth of 5.48 GHz. It is applied in the simulated inductance design. We first consider the conventional topology of the grounded inductance based on the generalized impedance converter principle. Making use of the controllable series parasitic resistance at port X in translinear CCII, we design tunable characteristics of the inductance. The effect of current conveyor's nonidealities has been taken into account. A compensation strategy has been presented. It is based on the insertion of a high active CCII-based negative resistance and a very low passive resistance. The compensation strategy does not affect the inductance tuning process. Simulation results show that the proposed inductance can be tuned in the range [0.025 μH; 15.4 μH]. The simulated inductance has been applied in a fully integrated tunable high frequency band pass filter to illustrate the versatility of the circuit. The filter is electrically tunable by controlling the conveyor's bias current.


This article given a second generation current controlled current conveyor positive (CCCII+), second generation current controlled current conveyor negative (CCCII-), Quadrature oscillator with high-Q frequency choosing network and implementing completely different phase oscillators by employing (CCCII+) positive and (CCCII-) negative, and high band pass filter network, the approach is predicted on the CMOS technology . The root of this concept is, considering a customary voltage mode oscillator which consists of band pass filter with prime quality issue (high-Q) and voltage mode amplifier is transfigure into current mode oscillator by replacing tans-conductance amplifier. Because the loop of the oscillator is has lavish selectivity, the oscillator process less distortion. In addition 3dB bandwidth, oscillating condition, oscillation frequency of the oscillator could linearly, independently and electronically be tuned by adjusting the bias current of the (CCCII±)[1], lastly different simulations have been carried out to verify the linearity between output and input ports, range of frequency operations. These results can justify that the designed circuits are workable.


Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1474
Author(s):  
Zhiqun Li ◽  
Yan Yao ◽  
Zengqi Wang ◽  
Guoxiao Cheng ◽  
Lei Luo

This paper presents a low-voltage ZigBee transceiver covering a unique frequency band of 780/868/915/2400 MHz in 180 nm CMOS technology. The design consists of a receiver with a wideband variable-gain front end and a complex band-pass filter (CBPF) based on poles construction, a transmitter employing the two-point direct-modulation structure, a Ʃ-Δ fractional-N frequency synthesizer with two VCOs and some auxiliary circuits. The measured results show that under 1 V supply voltage, the receiver reaches −93.8 dBm and −102 dBm sensitivity for 2.4 GHz and sub-GHz band, respectively, and dissipates only 1.42 mW power. The frequency synthesizer achieves −106.8 dBc/Hz and −116.7 dBc/Hz phase noise at 1 MHz frequency offset along with 4.2 mW and 3.5 mW power consumption for 2.4 GHz and sub-GHz band, respectively. The transmitter features 2.67 dBm and 12.65 dBm maximum output power at the expense of 21.2 mW and 69.5 mW power for 2.4 GHz and sub-GHz band, respectively.


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