A novel single-rail variable encoded completion detection scheme for self-timed circuit design using ternary multiple valued logic
2003 ◽
Vol 20
(3/4)
◽
pp. 233-267
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1982 ◽
Vol 129
(4)
◽
pp. 199
Keyword(s):
1985 ◽
Vol 132
(5)
◽
pp. 221