A Low Power Biopotential Amplifier based on Bulk Driven Quasi Floating Gate Technique

Author(s):  
Preeti Sharma ◽  
Kulbhushan Sharma ◽  
H. S. Jatana ◽  
Rajnish Sharma
2012 ◽  
Vol 6 (5) ◽  
pp. 508-516 ◽  
Author(s):  
Yuhwai Tseng ◽  
Yingchieh Ho ◽  
Shuoting Kao ◽  
Chauchin Su

Author(s):  
Y. Berg ◽  
D.T. Wisland ◽  
T.S. Lande
Keyword(s):  

2007 ◽  
Vol 28 (7) ◽  
pp. 622-624 ◽  
Author(s):  
Yan Li ◽  
Ru Huang ◽  
Yimao Cai ◽  
Falong Zhou ◽  
Xiaonan Shan ◽  
...  

Author(s):  
Kanan Bala Ray ◽  
Sushanta Kumar Mandal ◽  
Shivalal Patro

<em>In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm standard CMOS technology with 1 V power supply voltage. Simulation results show that FGSLEEPY LECTOR SRAM cell consumes very low power and achieves high stability compared to conventional FGSRAM Cell</em>


2019 ◽  
Vol 106 (5) ◽  
pp. 663-678
Author(s):  
Charu Rana ◽  
Neelofar Afzal ◽  
Dinesh Prasad

2013 ◽  
Vol 52 (9R) ◽  
pp. 094101 ◽  
Author(s):  
Yoshimitsu Yamauchi ◽  
Yoshinari Kamakura ◽  
Yousuke Isagi ◽  
Toshimasa Matsuoka ◽  
Satoshi Malotaux

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