Closed-form expressions for the line parameters of co-planar on-chip interconnects on lossy silicon substrates

2003 ◽  
Author(s):  
A. Luoh ◽  
A. Weisshaar
Keyword(s):  
Closed Form ◽  
Silicon Substrates ◽  
On Chip

scholarly journals TRANSIENT RESPONSE OF A DISTRIBUTED RLC INTERCONNECT BASED ON DIRECT POLE EXTRACTION

2009 ◽  
Vol 18 (07) ◽  
pp. 1263-1285 ◽  
Author(s):  
GUOQING CHEN ◽  
EBY G. FRIEDMAN
Keyword(s):  
Closed Form ◽  
Transient Response ◽  
Transmission Lines ◽  
Average Error ◽  
Proposed Model ◽  
Newton Raphson ◽  
On Chip ◽  
Interconnect Systems ◽  
Interconnect System ◽  
Raphson Method

With higher operating frequencies, transmission lines are required to model global on-chip interconnects. In this paper, an accurate and efficient solution for the transient response at the far end of a transmission line based on a direct pole extraction of the system is proposed. Closed form expressions of the poles are developed for two special interconnect systems: an RC interconnect and an RLC interconnect with zero driver resistance. By performing a system conversion, the poles of an interconnect system with general circuit parameters are solved. The Newton–Raphson method is used to further improve the accuracy of the poles. Based on these poles, closed form expressions for the step and ramp response are determined. Higher accuracy can be obtained with additional pairs of poles. The computational complexity of the model is proportional to the number of pole pairs. With two pairs of poles, the average error of the 50% delay is 1% as compared with Spectre simulations. With ten pairs of poles, the average error of the 10%-to-90% rise time and the overshoots is 2% and 1.9%, respectively. Frequency dependent effects are also successfully included in the proposed method and excellent match is observed between the proposed model and Spectre simulations.

A Novel Scheme for Wide Bandwidth Chip-to-Chip Communications

2007 ◽  
Vol 4 (1) ◽  
pp. 1-7 ◽  
Author(s):  
Qing Liu ◽  
Patrick Fay ◽  
Gary H. Bernstein
Keyword(s):  
Integrated Circuits ◽  
Coplanar Waveguide ◽  
Impedance Matching ◽  
Three Dimensional ◽  
Fabrication Process ◽  
Silicon Substrates ◽  
Electromagnetic Simulations ◽  
Communication Paradigm ◽  
On Chip ◽  
Test Chips

Quilt Packaging (QP), a novel chip-to-chip communication paradigm for system-in-package integration, is presented. By forming protruding metal nodules along the edges of the chips and interconnecting integrated circuits (ICs) through them, QP offers an approach to ameliorate the I/O speed bottleneck. A fabrication process that includes deep reactive ion etching, electroplating, and chemical-mechanical polishing is demonstrated. As a low-temperature process, it can be easily integrated into a standard IC fabrication process. Three-dimensional electromagnetic simulations of coplanar waveguide QP structures have been performed, and geometries intended to improve impedance matching at the interface between the on-chip interconnects and the chip-to-chip nodule structures were evaluated. Test chips with 100 μm wide nodules were fabricated on silicon substrates, and s-parameters of chip-to-chip interconnects were measured. The insertion loss of the chip-to-chip interconnects was as low as 0.2 dB at 40 GHz. Simulations of 20 μm wide QP structures suggest that the bandwidth of the inter-chip nodules is expected to be above 200 GHz.

Integrated Photonic Circuits in Gallium Nitride and Aluminum Nitride

2014 ◽  
Vol 23 (01n02) ◽  
pp. 1450001 ◽  
Author(s):  
Chi Xiong ◽  
Wolfram Pernice ◽  
Carsten Schuck ◽  
Hong X. Tang
Keyword(s):  
High Speed ◽  
Optical Signal ◽  
Silicon Substrates ◽  
Material System ◽  
Group Iii ◽  
Electro Optic ◽  
New Material ◽  
Nanophotonic Circuits ◽  
Group Iii Nitride ◽  
On Chip

Integrated optics is a promising optical platform both for its enabling role in optical interconnects and applications in on-chip optical signal processing. In this paper, we discuss the use of group III-nitride (GaN, AlN) as a new material system for integrated photonics compatible with silicon substrates. Exploiting their inherent second-order nonlinearity we demonstrate and second, third harmonic generation in GaN nanophotonic circuits and high-speed electro-optic modulation in AlN nanophotonic circuits.

Vertically aligned graphene nanosheets on silicon using an ionic liquid electrolyte: towards high performance on-chip micro-supercapacitors

2015 ◽  
Vol 3 (38) ◽  
pp. 19254-19262 ◽  
Author(s):  
David Aradilla ◽  
Marc Delaunay ◽  
Saïd Sadki ◽  
Jean-Michel Gérard ◽  
Gérard Bidan
Keyword(s):  
High Performance ◽  
Electron Cyclotron Resonance ◽  
Graphene Nanosheets ◽  
Chemical Vapor ◽  
Liquid Electrolyte ◽  
Silicon Substrates ◽  
Ionic Liquid Electrolyte ◽  
Vertically Aligned ◽  
On Chip ◽  
Resonance Plasma

Vertically oriented graphene nanosheets were synthesized by an alternative and simple approach based on electron cyclotron resonance-plasma enhanced chemical vapor deposition (ECR-CVD) onto highly doped silicon substrates.

Ultralow Temperature Processing and Integration of Dielectric Resonators on Silicon Substrates for System-on-Chip Applications

2008 ◽  
Vol 55 (7) ◽  
pp. 1727-1732 ◽  
Author(s):  
Pazhoor V. Bijumon ◽  
Alois P. Freundorfer ◽  
Michael Sayer ◽  
Yahia M. M. Antar
Keyword(s):  
System On Chip ◽  
Dielectric Resonators ◽  
Silicon Substrates ◽  
Ultralow Temperature ◽  
On Chip
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