scholarly journals An efficient and low power architecture design for motion estimation using global elimination algorithm

2002 ◽  
Author(s):  
Yu-Wen Huang ◽  
Shao-Yi Chien ◽  
Bing-Yu Hsieh ◽  
Liang-Gee Chen
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Architecture Design ◽  
Elimination Algorithm ◽  
Power Architecture

Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 Encoder

2007 ◽  
Vol 50 (1) ◽  
pp. 1-17 ◽  
Author(s):  
Yu-Han Chen ◽  
Tung-Chien Chen ◽  
Chuan-Yung Tsai ◽  
Sung-Fang Tsai ◽  
Liang-Gee Chen
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Data Reuse ◽  
Architecture Design

Architecture design of low-power motion estimation based on DHS-NPDS for H.264/AVC

2012 ◽  
Vol 55 (10) ◽  
pp. 2234-2242 ◽  
Author(s):  
YunBi Chen ◽  
ZhengDong Li ◽  
Li Guo ◽  
JinSheng Xie ◽  
Long Zhao
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Architecture Design

scholarly journals Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC

2007 ◽  
Vol 17 (5) ◽  
pp. 568-577 ◽  
Author(s):  
Tung-Chien Chen ◽  
Yu-Han Chen ◽  
Sung-Fang Tsai ◽  
Shao-Yi Chien ◽  
Liang-Gee Chen
Keyword(s):  
Motion Estimation ◽  
Low Power ◽  
Fast Algorithm ◽  
Architecture Design ◽  
Integer Motion Estimation
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