Substrate triggering and salicide effects on ESD performance and protection circuit design in deep submicron CMOS processes

Proceedings of International Electron Devices Meeting ◽

10.1109/iedm.1995.499280 ◽

2002 ◽

Cited By ~ 53

Author(s):

A. Amerasekera ◽

C. Duvvury ◽

V. Reddy ◽

M. Rodder

Keyword(s):

Circuit Design ◽

Deep Submicron ◽

Protection Circuit ◽

Submicron Cmos ◽

Cmos Processes

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Perimeter Gated Single Photon Avalanche Diodes in Sub-Micron and Deep-Submicron CMOS Processes

Selected Topics in Electronics and Systems - High Performance Logic and Circuits for High-Speed Electronic Systems ◽

10.1142/9789811208447_0005 ◽

2019 ◽

pp. 71-89

Author(s):

Mst Shamim Ara Shawkat ◽

Mohammad Habib Ullah Habib ◽

Md Sakib Hasan ◽

Mohammad Aminul Haque ◽

Nicole McFarlane

Keyword(s):

Single Photon ◽

Deep Submicron ◽

Avalanche Diodes ◽

Submicron Cmos ◽

Cmos Processes ◽

Single Photon Avalanche Diodes

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Polarization- and wavelength-sensitive sub-wavelength structures fabricated in the metal layers of deep submicron CMOS processes

10.1117/12.854536 ◽

2010 ◽

Cited By ~ 5

Author(s):

Stephan Junger ◽

Wladimir Tschekalinskij ◽

Nanko Verwaal ◽

Norbert Weber

Keyword(s):

Deep Submicron ◽

Submicron Cmos ◽

Metal Layers ◽

Sub Wavelength ◽

Cmos Processes

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Multi-mode, multi-band RF transceiver circuits for mobile terminals in deep-submicron CMOS processes

RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE Radio Frequency integrated Circuits ◽

10.1109/rfic.2005.1489851 ◽

2005 ◽

Cited By ~ 7

Author(s):

B. Bakkaloglu ◽

P.A. Fontaine

Keyword(s):

Deep Submicron ◽

Rf Transceiver ◽

Mobile Terminals ◽

Submicron Cmos ◽

Multi Mode ◽

Multi Band ◽

Cmos Processes

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EOS/ESD protection circuit design for deep submicron SOI technology

Electrical Overstress/Electrostatic Discharge Symposium Proceedings ◽

10.1109/eosesd.1995.478287 ◽

1995 ◽

Cited By ~ 17

Author(s):

S. Ramaswamy ◽

P. Raha ◽

E. Rosenbaum ◽

Sung-Mo Kang

Keyword(s):

Circuit Design ◽

Deep Submicron ◽

Esd Protection ◽

Protection Circuit ◽

Soi Technology

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The prediction of circuit performance variations for deep submicron CMOS processes

Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dftvs.1996.572015 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Gneiting ◽

I. Jalowiecki

Keyword(s):

Deep Submicron ◽

Circuit Performance ◽

Submicron Cmos ◽

Performance Variations ◽

Cmos Processes

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Fault Clustering in deep-submicron CMOS Processes

2008 Design, Automation and Test in Europe ◽

10.1109/date.2008.4484900 ◽

2008 ◽

Cited By ~ 3

Author(s):

Jan Schat

Keyword(s):

Deep Submicron ◽

Submicron Cmos ◽

Cmos Processes

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Mixed Signal Design Paradigms for Analog Circuit Design in Deep Submicron CMOS

Journal of Electrical & Electronic Systems ◽

10.4172/2332-0796.1000e111 ◽

2014 ◽

Vol 03 (01) ◽

Keyword(s):

Circuit Design ◽

Analog Circuit ◽

Deep Submicron ◽

Signal Design ◽

Analog Circuit Design ◽

Mixed Signal ◽

Submicron Cmos

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Improving the yield of deep submicron CMOS processes by controlling the grain size of poly-Si gate through post deposition rapid thermal anneal

IEEE Transactions on Semiconductor Manufacturing ◽

10.1109/tsm.2002.804904 ◽

2002 ◽

Vol 15 (4) ◽

pp. 552-554 ◽

Cited By ~ 2

Author(s):

A.H.M. Kamal

Keyword(s):

Grain Size ◽

Deep Submicron ◽

Rapid Thermal Anneal ◽

Submicron Cmos ◽

Post Deposition ◽

Cmos Processes

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Fault clustering in deep-submicron CMOS processes

2008 Design, Automation and Test in Europe ◽

10.1145/1403375.1403498 ◽

2008 ◽

Author(s):

Jan Schat

Keyword(s):

Deep Submicron ◽

Submicron Cmos ◽

Cmos Processes

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Deep submicron CMOS: Characteristics & circuit design

Tutorial Guide ISCAS 2001 IEEE International Symposium on Circuits and Systems (Cat No 01TH8573) TUTCAS-01 ◽

10.1109/tutcas.2001.946940 ◽

2002 ◽

Author(s):

J. Harrison

Keyword(s):

Circuit Design ◽

Deep Submicron ◽

Submicron Cmos

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