A novel low phase noise and low power DCO in 90 nm CMOS technology for ADPLL application
2014 ◽
Vol 45
(6)
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pp. 740-750
◽
2018 ◽
Vol 101
(1)
◽
pp. 391-403
◽
2018 ◽
Vol 95
(1)
◽
pp. 67-82
◽
2011 ◽
Vol 131
(8)
◽
pp. 1397-1402
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