4.5 A 1.8erms− temporal noise over 110dB dynamic range 3.4µm pixel pitch global shutter CMOS image sensor with dual-gain amplifiers, SS-ADC and multiple-accumulation shutter

2017 ◽  
Author(s):  
Masahiro Kobayashi ◽  
Yusuke Onuki ◽  
Kazunari Kawabata ◽  
Hiroshi Sekine ◽  
Toshiki Tsuboi ◽  
...  
Keyword(s):  
Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Temporal Noise ◽  
Pixel Pitch

scholarly journals Fully Depleted, Trench-Pinned Photo Gate for CMOS Image Sensor Applications

Sensors ◽  
2020 ◽  
Vol 20 (3) ◽  
pp. 727
Author(s):  
Francois Roy ◽  
Andrej Suler ◽  
Thomas Dalleau ◽  
Romain Duru ◽  
Daniel Benoit ◽  
...  
Keyword(s):  
Charge Transfer ◽  
Dynamic Range ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Deep Trench ◽  
Fully Depleted ◽  
Sensor Applications ◽  
Temporal Noise

Tackling issues of implantation-caused defects and contamination, this paper presents a new complementary metal–oxide–semiconductor (CMOS) image sensor (CIS) pixel design concept based on a native epitaxial layer for photon detection, charge storage, and charge transfer to the sensing node. To prove this concept, a backside illumination (BSI), p-type, 2-µm-pitch pixel was designed. It integrates a vertical pinned photo gate (PPG), a buried vertical transfer gate (TG), sidewall capacitive deep trench isolation (CDTI), and backside oxide–nitride–oxide (ONO) stack. The designed pixel was fabricated with variations of key parameters for optimization. Testing results showed the following achievements: 13,000 h+ full-well capacity with no lag for charge transfer, 80% quantum efficiency (QE) at 550-nm wavelength, 5 h+/s dark current at 60 °C, 2 h+ temporal noise floor, and 75 dB dynamic range. In comparison with conventional pixel design, the proposed concept could improve CIS performance.

An Over 120dB Dynamic Range Linear Response Single Exposure CMOS Image Sensor with Two-stage Lateral Overflow Integration Trench Capacitors

2020 ◽  
Vol 2020 (7) ◽  
pp. 143-1-143-6 ◽  
Author(s):  
Yasuyuki Fujihara ◽  
Maasa Murata ◽  
Shota Nakayama ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
Linear Response ◽  
Dynamic Range ◽  
Signal To Noise Ratio ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Signal To Noise ◽  
Single Exposure ◽  
Two Stage ◽  
Noise Ratio ◽  
Maximum Signal

This paper presents a prototype linear response single exposure CMOS image sensor with two-stage lateral overflow integration trench capacitors (LOFITreCs) exhibiting over 120dB dynamic range with 11.4Me- full well capacity (FWC) and maximum signal-to-noise ratio (SNR) of 70dB. The measured SNR at all switching points were over 35dB thanks to the proposed two-stage LOFITreCs.

A temperature-resistant wide-dynamic-range CMOS image sensor

2007 ◽  
Author(s):  
Koichi Mizobuchi ◽  
Satoru Adachi ◽  
Tomokazu Yamashita ◽  
Seiichiro Okamura ◽  
Hiromichi Oshikubo ◽  
...  
Keyword(s):  
Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wide Dynamic Range

A wide dynamic range checkered-color CMOS image sensor with IR-Cut RGB and visible-to-near-IR pixels

2009 ◽  
Author(s):  
Shun Kawada ◽  
Shin Sakai ◽  
Nana Akahane ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
Dynamic Range ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Wide Dynamic Range ◽  
Near Ir
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