Amplification, feedback, and sub-biasing: Applying analog techniques to high-speed, low-power digital CMOS circuits

2017 ◽  
Author(s):  
Daniel Foty
Keyword(s):  
Low Power ◽  
High Speed ◽  
Cmos Circuits ◽  
Digital Cmos

scholarly journals Performance Analysis of Modified Drain Gating Techniques for Low Power and High Speed Arithmetic Circuits

VLSI Design ◽  
2014 ◽  
Vol 2014 ◽  
pp. 1-5 ◽  
Author(s):  
Shikha Panwar ◽  
Mayuresh Piske ◽  
Aatreya Vivek Madgula
Keyword(s):  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Room Temperature ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Propagation Delay ◽  
Cmos Circuits ◽  
Output Node ◽  
Critical Sections

This paper presents several high performance and low power techniques for CMOS circuits. In these design methodologies, drain gating technique and its variations are modified by adding an additional NMOS sleep transistor at the output node which helps in faster discharge and thereby providing higher speed. In order to achieve high performance, the proposed design techniques trade power for performance in the delay critical sections of the circuit. Intensive simulations are performed using Cadence Virtuoso in a 45 nm standard CMOS technology at room temperature with supply voltage of 1.2 V. Comparative analysis of the present circuits with standard CMOS circuits shows smaller propagation delay and lesser power consumption.

Delay-Assignment-Variation Based Optimization of Digital CMOS Circuits for Low Power Consumption

2007 ◽  
Vol 3 (1) ◽  
pp. 78-95
Author(s):  
Yuvraj Singh Dhillon ◽  
Abdulkadir Utku Diril ◽  
Abhijit Chatterjee
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Low Power Consumption ◽  
Cmos Circuits ◽  
Digital Cmos

High-speed, low-power, implanted-buried-oxide CMOS circuits

1986 ◽  
Vol 7 (5) ◽  
pp. 279-281 ◽  
Author(s):  
J.-P. Colinge ◽  
K. Hashimoto ◽  
T. Kamins ◽  
Shang-Yi Chiang ◽  
En-Den Liu ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Cmos Circuits ◽  
Buried Oxide

scholarly journals A low-power, high-speed, 9-channel germanium-silicon electro-absorption modulator array integrated with digital CMOS driver and wavelength multiplexer

2014 ◽  
Vol 22 (10) ◽  
pp. 12289 ◽  
Author(s):  
A. V. Krishnamoorthy ◽  
X. Zheng ◽  
D. Feng ◽  
J. Lexau ◽  
J. F. Buckwalter ◽  
...  
Keyword(s):  
Low Power ◽  
High Speed ◽  
Digital Cmos ◽  
Germanium Silicon
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