Reliable and efficient system-on-chip design

Computer ◽

10.1109/mc.2004.1274003 ◽

2004 ◽

Vol 37 (3) ◽

pp. 42-50 ◽

Author(s):

N.R. Shanbhag

Keyword(s):

System On Chip ◽

Chip Design ◽

Efficient System ◽

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IP development and management of IP DB enabling efficient system-on-chip design

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) ◽

10.1109/apasic.1999.824070 ◽

2003 ◽

Author(s):

Young-ho Lee ◽

Ki-Won Kwon ◽

Jin-Tea Kim ◽

Chul-Dong Lee

Keyword(s):

System On Chip ◽

Chip Design ◽

Efficient System ◽

On Chip ◽

Development And Management

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Energy Efficient System-on-chip Design for Wireless Body Area Sensor Network

Electric Power Components and Systems ◽

10.1080/15325008.2014.890973 ◽

2014 ◽

Vol 42 (7) ◽

pp. 737-745

Author(s):

Chi-Chou Kao ◽

Wen-Lin Yang

Keyword(s):

Sensor Network ◽

Energy Efficient ◽

System On Chip ◽

Body Area ◽

Chip Design ◽

Efficient System ◽

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Automated IP quality qualification for efficient system-on-chip design

2012 13th International Conference on Electronic Packaging Technology & High Density Packaging ◽

10.1109/icept-hdp.2012.6474826 ◽

2012 ◽

Author(s):

Li-wei Wang ◽

Hong-wei Luo

Keyword(s):

System On Chip ◽

Chip Design ◽

Efficient System ◽

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Developing silicon intellectual property E-trade mechanisms for system on chip design and integration

International Journal of Computer Integrated Manufacturing ◽

10.1080/09511920601160122 ◽

2007 ◽

Vol 20 (5) ◽

pp. 423-435 ◽

Author(s):

C. V. Trappey ◽

A. J. C. Trappey ◽

F. T. L. Lin

Keyword(s):

Intellectual Property ◽

System On Chip ◽

Chip Design ◽

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Tutorial T4: Intellectual Property Protection and Security in System-on-Chip Design

2012 25th International Conference on VLSI Design ◽

10.1109/vlsid.2012.31 ◽

2012 ◽

Author(s):

Susmita Sur-Kolay ◽

S. Bhunia

Keyword(s):

Intellectual Property ◽

System On Chip ◽

Intellectual Property Protection ◽

Chip Design ◽

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System Architecting and System-on-Chip Design of Intelligent Sensor Networks for Active Volcanoes

2008 2nd Annual IEEE Systems Conference ◽

10.1109/systems.2008.4519025 ◽

2008 ◽

Author(s):

Wai-Chi Fang ◽

Sharon Kedar

Keyword(s):

Sensor Networks ◽

System On Chip ◽

Chip Design ◽

Intelligent Sensor ◽

On Chip ◽

Intelligent Sensor Networks ◽

Active Volcanoes

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High Level System-on-Chip Design using UML and SystemC

Electronics, Robotics and Automotive Mechanics Conference (CERMA 2007) ◽

10.1109/cerma.2007.4367776 ◽

2007 ◽

Author(s):

Blanca Alicia Correa ◽

Juan Fernando Eusse ◽

Danny Munera ◽

Jose Edinson Aedo ◽

Juan Fernando Velez

Keyword(s):

System On Chip ◽

Level System ◽

Chip Design ◽

On Chip ◽

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Mixed-Signal Noise Coupling in System-on-Chip Design: Modeling, Analysis, and Validation

EDA for IC Implementation, Circuit Design, and Process Technology ◽

10.1201/9781420007954-23 ◽

2018 ◽

pp. 23_1-23_25

Author(s):

Nishath Verghese ◽

Makoto Nagata

Keyword(s):

System On Chip ◽

Chip Design ◽

Mixed Signal ◽

Signal Noise ◽

Noise Coupling ◽

Modeling Analysis ◽

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A System on Chip Design Framework for Prime Number Validation Using Reconfigurable Hardware

Field Programmable Logic and Application - Lecture Notes in Computer Science ◽

10.1007/978-3-540-30117-2_173 ◽

2004 ◽

pp. 1186-1187

Author(s):

Ray C. C. Cheung

Keyword(s):

Prime Number ◽

Reconfigurable Hardware ◽

System On Chip ◽

Design Framework ◽

Chip Design ◽

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Colif: A multilevel design representation for application-specific multiprocessor system-on-chip design

Proceedings 12th International Workshop on Rapid System Prototyping. RSP 2001 ◽

10.1109/iwrsp.2001.933847 ◽

2002 ◽

Author(s):

W.O. Cesario ◽

G. Nicolescu ◽

L. Gauthier ◽

D. Lyonnard ◽

A.A. Jerraya

Keyword(s):

System On Chip ◽

Multiprocessor System ◽

Chip Design ◽

Design Representation ◽

On Chip ◽

Application Specific

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