Fast Switching Transition Model Describing Parasitic Dynamics Intrinsically Induced by Discontinuous Control

2021 ◽  
Author(s):  
Francisco J. Ruiz-Sanchez
Keyword(s):  
Transition Model ◽  
Discontinuous Control ◽  
Fast Switching

Iron Loss Characteristics of Motors Fed by Fast Switching GaN-FET Inverters

2020 ◽  
Vol 140 (6) ◽  
pp. 488-494
Author(s):  
Haruo Naitoh ◽  
Takaya Sugimoto ◽  
Keisuke Fujisaki
Keyword(s):  
Iron Loss ◽  
Fast Switching ◽  
Gan Fet

New Roughness-Induced Transition Model for Simulating Ice Accretion on Airfoils

AIAA Journal ◽  
2021 ◽  
Vol 59 (1) ◽  
pp. 250-262
Author(s):  
Seungin Min ◽  
Kwanjung Yee
Keyword(s):  
Transition Model ◽  
Ice Accretion

Methodology for Analysis of Schottky Diode Failures

2010 ◽  
Author(s):  
Bhanu P. Sood ◽  
Michael Pecht ◽  
John Miker ◽  
Tom Wanek
Keyword(s):  
Failure Mode ◽  
Schottky Diode ◽  
Failure Modes ◽  
Schottky Diodes ◽  
Failure Mechanisms ◽  
Forward Voltage ◽  
Fast Switching ◽  
Voltage Drops ◽  
The Common

Abstract Schottky diodes are semiconductor switching devices with low forward voltage drops and very fast switching speeds. This paper provides an overview of the common failure modes in Schottky diodes and corresponding failure mechanisms associated with each failure mode. Results of material level evaluation on diodes and packages as well as manufacturing and assembly processes are analyzed to identify a set of possible failure sites with associated failure modes, mechanisms, and causes. A case study is then presented to illustrate the application of a systematic FMMEA methodology to the analysis of a specific failure in a Schottky diode package.

High-Density Memristor-CMOS Ternary Logic Family

2020 ◽  
Author(s):  
Xiaoyuan Wang ◽  
Pengfei Zhou ◽  
Jason Eshraghian ◽  
Chih-Yang Lin ◽  
Herbert Ho-Ching Iu ◽  
...  
Keyword(s):  
Indium Tin Oxide ◽  
Practical Implementation ◽  
Switching Speed ◽  
High Data ◽  
Fast Switching ◽  
Data Density ◽  
Order Of Magnitude ◽  
High Transconductance ◽  
Logic Functions ◽  
Magnitude Improvement

<div>This paper presents the first experimental demonstration</div><div>of a ternary memristor-CMOS logic family. We systematically</div><div>design, simulate and experimentally verify the primitive</div><div>logic functions: the ternary AND, OR and NOT gates. These are then used to build combinational ternary NAND, NOR, XOR and XNOR gates, as well as data handling ternary MAX and MIN gates. Our simulations are performed using a 50-nm process which are verified with in-house fabricated indium-tin-oxide memristors, optimized for fast switching, high transconductance, and low current leakage. We obtain close to an order of magnitude improvement in data density over conventional CMOS logic, and a reduction of switching speed by a factor of 13 over prior state-of-the-art ternary memristor results. We anticipate extensions of this work can realize practical implementation where high data density is of critical importance.</div>

Interaction and Transition Model for Speech Emotion Recognition in Dialogue

2017 ◽  
Author(s):  
Ruo Zhang ◽  
Ando Atsushi ◽  
Satoshi Kobashikawa ◽  
Yushi Aono
Keyword(s):  
Emotion Recognition ◽  
Speech Emotion Recognition ◽  
Transition Model
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