A fully-integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems

Author(s):  
Yido Koo ◽  
Hyungki Huh ◽  
Yongsik Cho ◽  
Jeongwoo Lee ◽  
Joonbae Park ◽  
...  
Author(s):  
Gaurav Kumar Sharma ◽  
Arun Kishor Johar ◽  
D. Boolchandani

A wide range frequency synthesizer is designed with the help of dual voltage tunable Differential Ring Oscillator (DRO). Frequency ranging from 534[Formula: see text]MHz to 18.56[Formula: see text]GHz can be generated using the proposed synthesizer. As proposed circuit utilizes dual voltage tunable DRO, a select input is provided to control the output frequency range. Logic low value (0[Formula: see text]V) of select input generates frequencies from 534[Formula: see text]MHz to 5.08[Formula: see text]GHz whereas logic high value (1.1[Formula: see text]V) of select input enables the frequency generation in the range of 5.08[Formula: see text]GHz to 18.56[Formula: see text]GHz. This work utilizes a single charge pump and single loop filter along with charge pump and bias control circuit. Proposed circuit is designed in GPDK 45-nm CMOS technology with supply voltage of 1.1[Formula: see text]V. Power consumption of the proposed circuits is 2.88[Formula: see text]mW while generating frequency of 7.84[Formula: see text]GHz. Proposed synthesizer demonstrates Figure of Merit (FoM2) of [Formula: see text][Formula: see text]dBc/Hz at this frequency. Because of such a wide spectrum, this synthesizer is well suited in the field of satellite communication, GPS and navigation.


2018 ◽  
Vol 27 (08) ◽  
pp. 1850131 ◽  
Author(s):  
Mostafa Azadbakht ◽  
Ali Sahafi ◽  
Esmaeil Najafi Aghdam

This work presents a fully integrated fractional-[Formula: see text] frequency synthesizer that covers the entire frequency bands specified in the IEEE 802.11 a/b/g/n. In this paper, the effects of charge pump (CP) gain mismatch on spectral purity of local oscillator signal is studied theoretically and a new high precision self-calibrated CP is presented for alleviating the nonidealities. The idea is implemented in a 0.18-[Formula: see text]m standard CMOS technology. According to post layout simulation, the proposed calibration circuit demonstrates an excellent matching in the CP currents in a wide voltage range. By using this technique, the average of close-in phase noise of the designed frequency synthesizer is suppressed by more than 12[Formula: see text]dBc. The active whole chip die area is 0.475[Formula: see text]mm2 and the power dissipation from a 1.8-V DC supply is 17.3–20.6[Formula: see text]mW.


2017 ◽  
Vol 26 (12) ◽  
pp. 1750196 ◽  
Author(s):  
Yanzhao Ma ◽  
Yinghui Zou ◽  
Shengbing Zhang ◽  
Xiaoya Fan

A fully-integrated self-startup circuit with ultra-low voltage for thermal energy harvesting is presented in this paper. The converter is composed of an enhanced swing LC oscillator and a charge pump with decreased equivalent input capacitance. The LC oscillator has ultra-low input voltage and high output voltage swing, and the charge pump has a fast charging speed and small equivalent input capacitance. This circuit is designed with 0.18[Formula: see text][Formula: see text]m standard CMOS process. The simulation results show that the output voltage is in the range of 0.14[Formula: see text]V and 2.97[Formula: see text]V when the input voltage is changed from 50[Formula: see text]mV to 150[Formula: see text]mV. The output voltage could reach 2.87[Formula: see text]V at the input voltage of 150[Formula: see text]mV and the load of 1[Formula: see text]M[Formula: see text]. The maximum efficiency is in the range of 10.0% and 14.8% when the input voltage is changed from 0.2[Formula: see text]V to 0.4[Formula: see text]V. The circuit is suitable for thermoelectric energy harvesting to start with ultra-low input voltage.


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