scholarly journals Robust and Attack Resilient Logic Locking with a High Application-Level Impact

2021 ◽  
Vol 17 (3) ◽  
pp. 1-22
Author(s):  
Yuntao Liu ◽  
Michael Zuzak ◽  
Yang Xie ◽  
Abhishek Chakraborty ◽  
Ankur Srivastava
Keyword(s):  
Integrated Circuit ◽  
State Of The Art ◽  
Wide Spectrum ◽  
Mathematical Formulation ◽  
Security Threats ◽  
High Effectiveness ◽  
Logic Locking ◽  
Protecting Intellectual Property ◽  
Circuit Output ◽  
High Application

Logic locking is a hardware security technique aimed at protecting intellectual property against security threats in the IC supply chain, especially those posed by untrusted fabrication facilities. Such techniques incorporate additional locking circuitry within an integrated circuit (IC) that induces incorrect digital functionality when an incorrect verification key is provided by a user. The amount of error induced by an incorrect key is known as the effectiveness of the locking technique. A family of attacks known as “SAT attacks” provide a strong mathematical formulation to find the correct key of locked circuits. To achieve high SAT resilience (i.e., complexity of SAT attacks), many conventional logic locking schemes fail to inject sufficient error into the circuit when the key is incorrect. For example, in the case of SARLock and Anti-SAT, there are usually very few (or only one) input minterms that cause any error at the circuit output. The state-of-the-art s tripped functionality logic locking (SFLL) technique provides a wide spectrum of configurations that introduced a tradeoff between SAT resilience and effectiveness. In this work, we prove that such a tradeoff is universal among all logic locking techniques. To attain high effectiveness of locking without compromising SAT resilience, we propose a novel logic locking scheme, called Strong Anti-SAT (SAS). In addition to SAT attacks, removal-based attacks are another popular kind of attack formulation against logic locking where the attacker tries to identify and remove the locking structure. Based on SAS, we also propose Robust SAS (RSAS) that is resilient to removal attacks and maintains the same SAT resilience and effectiveness as SAS. SAS and RSAS have the following significant improvements over existing techniques. (1) We prove that the SAT resilience of SAS and RSAS against SAT attack is not compromised by increase in effectiveness . (2) In contrast to prior work that focused solely on the circuit-level locking impact, we integrate SAS-locked modules into an 80386 processor and show that SAS has a high application-level impact. (3) Our experiments show that SAS and RSAS exhibit better SAT resilience than SFLL and their effectiveness is similar to SFLL.

scholarly journals A Theoretically Derived Probability Distribution of Scour

2018 ◽  
Author(s):  
Salvatore Manfreda ◽  
Oscar Link ◽  
Alonso Pizarro
Keyword(s):  
Probability Distribution ◽  
Closed Form ◽  
State Of The Art ◽  
Mathematical Formulation ◽  
Gumbel Distribution ◽  
The State ◽  
Bridge Scour ◽  
Flood Peak ◽  
Hydraulic Conditions ◽  
Model Extension

Based on recent contributions regarding the treatment of unsteady hydraulic conditions into the state-of-the-art of scour literature, the theoretically derived probability distribution of bridge scour is introduced. The model is derived assuming a rectangular hydrograph shape with a given duration, and random flood peak following a Gumbel distribution. A model extension for a more complex flood event is also presented, assuming a synthetic exponential hydrograph shape. The mathematical formulation can be extended to any flood-peak probability distribution. The aim of the manuscript is to move forward the current approaches adopted for the bridge design coupling hydrological, hydraulic, and erosional models in a mathematical closed form.

scholarly journals Chip-to-Chip Authentication Method Based on SRAM PUF and Public Key Cryptography

2019 ◽  
Vol 3 (4) ◽  
pp. 382-396 ◽  
Author(s):  
Ioannis Karageorgos ◽  
Mehmet M. Isgenc ◽  
Samuel Pagliarini ◽  
Larry Pileggi
Keyword(s):  
Integrated Circuit ◽  
Hardware Implementation ◽  
State Of The Art ◽  
Public Key Cryptography ◽  
Cmos Technology ◽  
Performance Level ◽  
The Other ◽  
Public Key ◽  
Critical Systems ◽  
Software Vulnerabilities

AbstractIn today’s globalized integrated circuit (IC) ecosystem, untrusted foundries are often procured to build critical systems since they offer state-of-the-art silicon with the best performance available. On the other hand, ICs that originate from trusted fabrication cannot match the same performance level since trusted fabrication is often available on legacy nodes. Split-Chip is a dual-IC approach that leverages the performance of an untrusted IC and combines it with the guaranties of a trusted IC. In this paper, we provide a framework for chip-to-chip authentication that can further improve a Split-Chip system by protecting it from attacks that are unique to Split-Chip. A hardware implementation that utilizes an SRAM-based PUF as an identifier and public key cryptography for handshake is discussed. Circuit characteristics are provided, where the trusted IC is designed in a 28-nm CMOS technology and the untrusted IC is designed in an also commercial 16-nm CMOS technology. Most importantly, our solution does not require a processor for performing any of the handshake or cryptography tasks, thus being not susceptible to software vulnerabilities and exploits.

scholarly journals An Analysis of Smart Contracts Security Threats Alongside Existing Solutions

Entropy ◽  
2020 ◽  
Vol 22 (2) ◽  
pp. 203
Author(s):  
Antonio López Vivar ◽  
Alberto Turégano Castedo ◽  
Ana Lucila Sandoval Orozco ◽  
Luis Javier García Villalba
Keyword(s):  
Economic Impact ◽  
State Of The Art ◽  
Public Domain ◽  
Third Parties ◽  
The State ◽  
Security Threats ◽  
Smart Contracts ◽  
Holistic View ◽  
Security Challenges ◽  
Very High

Smart contracts have gained a lot of popularity in recent times as they are a very powerful tool for the development of decentralised and automatic applications in many fields without the need for intermediaries or trusted third parties. However, due to the decentralised nature of the blockchain on which they are based, a series of challenges have emerged related to vulnerabilities in their programming that, given their particularities, could have (and have already had) a very high economic impact. This article provides a holistic view of security challenges associated with smart contracts, as well as the state of the art of available public domain tools.

scholarly journals Technologies, Design, and Applications of Low-Noise Amplifiers at Millimetre-Wave: State-of-the-Art and Perspectives

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1222 ◽  
Author(s):  
Longhi ◽  
Pace ◽  
Colangeli ◽  
Ciccognani ◽  
Limiti
Keyword(s):  
Integrated Circuit ◽  
Noise Figure ◽  
State Of The Art ◽  
Low Noise ◽  
Low Noise Amplifiers ◽  
Wave State ◽  
Millimetre Wave ◽  
Monolithic Microwave Integrated Circuit ◽  
V Band ◽  
And Performance

An overview of applicable technologies and design solutions for monolithic microwave integrated circuit (MMIC) low-noise amplifiers (LNAs) operating at millimeter-wave are provided in this paper. The review starts with a brief description of the targeted applications and corresponding systems. Advanced technologies are presented highlighting potentials and drawbacks related to the considered possibilities. Design techniques, applicable to different requirements, are presented and analyzed. An LNA operating at V-band (59–66 GHz) is designed and tested following the presented guidelines, demonstrating state-of-the-art results in terms of noise figure (average NF < 2 dB). A state-of-the-art table, reporting recent results available in open literature on this topic, is provided and examined, focusing on room temperature operation and performance in cryogenic environment. Finally, trends versus frequency and perspectives are outlined.

High-power monolithic AlGaN/GaN high electron mobility transistor switches

2009 ◽  
Vol 1 (4) ◽  
pp. 339-345 ◽  
Author(s):  
Vincenzo Alleva ◽  
Andrea Bettidi ◽  
Walter Ciccognani ◽  
Marco De Dominicis ◽  
Mauro Ferrari ◽  
...  
Keyword(s):  
Insertion Loss ◽  
High Power ◽  
Integrated Circuit ◽  
State Of The Art ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
Monolithic Microwave Integrated Circuit ◽  
X Band ◽  
Power Handling Capability ◽  
Better Than

This work presents the design, fabrication, and test of X-band and 2–18 GHz wideband high-power single pole double throw (SPDT) monolithic microwave integrated circuit (MMIC) switches in microstrip gallium nitride (GaN) technology. Such switches have demonstrated state-of-the-art performances and RF fabrication yields better than 65%. In particular, the X-band switch exhibits 1 dB insertion loss, better than 37 dB isolation, and a power handling capability better than 39 dBm at a 1 dB insertion loss compression point; the wideband switch shows an insertion loss lower than 2.2 dB, better than 25 dB isolation, and an insertion loss compression of 1 dB at an input drive higher than 38.5 dBm in the entire bandwidth.

Mitigating Curtaining Artifacts During Ga FIB TEM Lamella Preparation of a 14 nm FinFET Device

2017 ◽  
Vol 23 (3) ◽  
pp. 484-490 ◽  
Author(s):  
Andrey Denisyuk ◽  
Tomáš Hrnčíř ◽  
Jozef Vincenc Oboňa ◽  
Sharang ◽  
Martin Petrenec ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Focused Ion Beam ◽  
State Of The Art ◽  
Incident Angle ◽  
Ion Beam ◽  
Preparation Technique ◽  
Metal Contacts ◽  
Transmission Electron ◽  
High Resolution Tem ◽  
Tem Lamella

AbstractWe report on the mitigation of curtaining artifacts during transmission electron microscopy (TEM) lamella preparation by means of a modified ion beam milling approach, which involves altering the incident angle of the Ga ions by rocking of the sample on a special stage. We applied this technique to TEM sample preparation of a state-of-the-art integrated circuit based on a 14-nm technology node. Site-specific lamellae with a thickness <15 nm were prepared by top-down Ga focused ion beam polishing through upper metal contacts. The lamellae were analyzed by means of high-resolution TEM, which showed a clear transistor structure and confirmed minimal curtaining artifacts. The results are compared with a standard inverted thinning preparation technique.

scholarly journals Unobtrusive Behavioral and Activity-Related Multimodal Biometrics: The ACTIBIO Authentication Concept

2011 ◽  
Vol 11 ◽  
pp. 503-519 ◽  
Author(s):  
A. Drosou ◽  
D. Ioannidis ◽  
K. Moustakas ◽  
D. Tzovaras
Keyword(s):  
State Of The Art ◽  
Wide Spectrum ◽  
Gait Recognition ◽  
Biometric Recognition ◽  
Multimodal Biometrics ◽  
Physiological Profile ◽  
Security Authentication ◽  
Recognition Systems ◽  
Real Scenario ◽  
New Algorithms

Unobtrusive Authentication Using ACTIvity-Related and Soft BIOmetrics (ACTIBIO) is an EU Specific Targeted Research Project (STREP) where new types of biometrics are combined with state-of-the-art unobtrusive technologies in order to enhance security in a wide spectrum of applications. The project aims to develop a modular, robust, multimodal biometrics security authentication and monitoring system, which uses a biodynamic physiological profile, unique for each individual, and advancements of the state of the art in unobtrusive behavioral and other biometrics, such as face, gait recognition, and seat-based anthropometrics. Several shortcomings of existing biometric recognition systems are addressed within this project, which have helped in improving existing sensors, in developing new algorithms, and in designing applications, towards creating new, unobtrusive, biometric authentication procedures in security-sensitive, Ambient Intelligence environments. This paper presents the concept of the ACTIBIO project and describes its unobtrusive authentication demonstrator in a real scenario by focusing on the vision-based biometric recognition modalities.

Privacy Preserving Framework to Support Mobile Government Services

2016 ◽  
Vol 11 (3) ◽  
pp. 65-78 ◽  
Author(s):  
Muder Almiani ◽  
Abdul Razaque ◽  
Ayman Al Dmour
Keyword(s):  
Mathematical Formulation ◽  
Information Provision ◽  
Privacy Preserving ◽  
Service Improvement ◽  
Cellular Phones ◽  
Security Threats ◽  
Mobile Cellular ◽  
Efficient Information ◽  
The Government

With dramatic increase in the mobile technology, the mobile cellular phones have played a significant role in the several fields particularly, education, military, business and health. The deployment of mobile phone in the Government has been of high interest of research community to improve fundamental functions, efficient information provision and augmenting the quality of service QoS provisioning. A lot of research is conducted for service improvement in Mobile Government(M-Government), but there is marginal research is available for security particularly privacy preserving of M-Government. In this paper, the authors propose privacy preserving framework for M-Government to secure an administration interface to avoid possible security threats. The proposed framework is verified using mathematical formulation. Furthermore, the proposed framework is tested using Java Platform. The experimental results confirm the reliability, efficiency and QoS provision of the privacy preserving framework.

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