Dynamic Characteristics of Amorphous Silicon Thin Film Transistors

1987 ◽  
Vol 95 ◽  
Author(s):  
C. van Berkel ◽  
J. R. Hughes ◽  
M. J. Powell
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Dynamic Characteristics ◽  
Threshold Voltage ◽  
Spatial Dependence ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Time Interval ◽  
Continuous Change ◽  
Silicon Thin Film

AbstractIn this paper we report on the dynamic characteristics of amorphous silicon thin film transistors in the time interval between ips to 1s after gate switch-on. The experimental results show a continuous change in the threshold voltage in this t'me regime. A model based on carrier thermalisation to the deep states including the spatial dependence of the thermalisation process in the band-banding region is presented to account for these results. The effect responsible for the observed time dependence of the threshold voltage is shown to be the trapping of charge in deep states in the bulk amorphous silicon away from the interface with the gate dielectric.

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Low frequency noise in amorphous silicon thin film transistors with SiNx gate dielectric

2009 ◽  
Vol 105 (12) ◽  
pp. 124504 ◽  
Author(s):  
S. L. Rumyantsev ◽  
Sung Hun Jin ◽  
M. S. Shur ◽  
Mun-Soo Park
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Frequency ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Silicon Thin Film

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 420 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Threshold Voltage Shifts in Amorphous Silicon Thin Film Transistors under Bias Stress

1990 ◽  
Vol 192 ◽  
Author(s):  
Tetsu Ogawa ◽  
Sadayoshi Hotta ◽  
Horoyoshi Takezawa
Keyword(s):  
Thin Film ◽  
Temperature Dependence ◽  
Amorphous Silicon ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Charge Trapping ◽  
The Other ◽  
Time Dependent ◽  
Silicon Thin Film ◽  
Bias Stress

ABSTRACTThrough the time and temperature dependence measurements on threshold voltage shifts (Δ VT) in amorphous silicon thin film transistors, it has been found that two separate instability mechanisms exist; within short stress time ranges Δ Vτ increases as log t and this behavior corresponds to charge trapping in SiN. On the other hand, in long stress time ranges Δ VT increases as t t/4 and can be explained by time-dependent creation of trap in a-Si.

Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors During Pulse Operation

1991 ◽  
Vol 30 (Part 1, No. 12B) ◽  
pp. 3719-3723 ◽  
Author(s):  
Ryoji Oritsuki ◽  
Toshikazu Horii ◽  
Akira Sasano ◽  
Ken Tsutsui ◽  
Toshiko Koizumi ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Pulse Operation ◽  
Threshold Voltage Shift ◽  
Voltage Shift

Thin-Film Transistors on PET at 100°C

2002 ◽  
Vol 715 ◽  
Author(s):  
J.P. Conde ◽  
P. Alpuim ◽  
V. Chu
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Contact Layer ◽  
Processing Temperature ◽  
Silicon Thin Film ◽  
Glass Substrates ◽  
Hydrogen Dilution ◽  
Polyethylene Terephthalate Substrate

AbstractBottom-gate amorphous silicon thin-film transistors were fabricated on a polyethylene terephthalate substrate. The maximum processing temperature was 100°C. The transistor characteristics are comparable, although still inferior, to those of standard amorphous silicon transistors fabricated on glass substrates. To obtain these characteristics, an extended anneal the processing temperature was required. The devices were fabricated using separately optimized low-temperature active layer, contact layer and gate dielectric layer. To achieve good electronic properties for these layers, hydrogen dilution was required.

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