A 10-bit 100 MS/s Successive Approximation Register Analog-To-Digital Converter Design

2014 ◽  
Vol E97.C (8) ◽  
pp. 833-836 ◽  
Author(s):  
Jhin-Fang HUANG ◽  
Wen-Cheng LAI ◽  
Cheng-Gu HSIEH
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