Investigation and Reliability Analysis of Fifteen Level Asymmetrical Multilevel Inverter Topology using Nearest Level Control Technique with low Component Count

Author(s):  
Abeera Dutt Roy ◽  
Chandrahasan Umayal

Background:: In multilevel inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods:: An asymmetrical multilevel inverter topology using a bidirectional switch is presented which employs lesser number of power electronic devices to produce fifteen levels at the output voltage. Nearest Level modulation (NLM) technique is used to generate the switching pulses and reliability analysis is performed using Markov reliability methodology. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results:: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. The fifteen level is achieved by using only 9 switches and 3 DC sources in comparison to the 28 switches and 6 DC sources required by the traditional cascaded H-bridge inverter. Conclusion:: The simulation and hardware results confirm the suitability of the proposed fifteen level MLI as the total component count and the requirement of DC sources reduces considerably.

Author(s):  
Abeera D. Roy ◽  
Chandrahasan Umayal

Background: In Multilevel Inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods: This paper deals with an asymmetrical cascaded H-bridge inverter topology with half bridge cells to produce seven level output voltage waveform. Nearest Level Control (NLM) technique is used to produce the switching pulses. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. Comparison between the proposed MLI and recent topologies demonstrates the advantageous features. Conclusion: The simulation and hardware results confirm the suitability of the proposed seven level MLI as the total component count, and the requirement of DC sources reduces considerably.


2017 ◽  
Vol 7 (1.5) ◽  
pp. 209
Author(s):  
B.Vijaya Krishna ◽  
B. Venkata Prashanth ◽  
P. Sujatha

Multilevel Inverters (MLI) have very good features when compared to Inverters. But using more switches in the conventional configuration will reduce its application in a wider range. For that reason a modified 7-level MLI Topology is presented. This new topology consists of less number of switches that can be reduced to the maximum extent and a separate gate trigger circuit. This will reduce the switching losses, reduce the size of the multilevel inverter, and cost of installation. This new topology can be used in Electrical drives and renewable energy applications. Performance of the new MLI is tested via. Total harmonic distortion. This construction structure of this multilevel inverter topology can also be increased for 9-level, 11-level and so on and simulated by the use of MATLAB/SIMULINK. A separate Carrier Based PWM Technique is used for the pulse generation in this configuration.


2019 ◽  
Vol 5 (6) ◽  
pp. 9
Author(s):  
Deepa Raghuwanshi ◽  
Santosh Kumar

Multilevel inverters with a large number of steps can generate high quality voltage waveforms, good enough to be considered as suitable voltage source generators. An advanced multilevel inverter topology is proposed to optimize number of bidirectional switches. In this work the an five-level cascade H-bridge Inverter, which uses multicarrier based control structure and two capacitor with 10 switching MOSFETs topology is being presented. Analysis is done for RL and pure resistive load. The PWM strategy reduces the THD and this strategy enhances the fundamental output voltage. The experimental and simulated results show that total harmonic distortion of output voltage and current waveform shapes are 5.16 % and 5.77% respectively for RL load which are within the acceptable limits.


2022 ◽  
Vol 18 (1) ◽  
pp. 48-57
Author(s):  
Aws Al-Jrew ◽  
Jawad Mahmood ◽  
Ramzy Ali

In this article, a comparison of innovative multilevel inverter topology with standard topologies has been conducted. The proposed single phase five level inverter topology has been used for induction heating system. This suggested design generates five voltage levels with a fewer number of power switches. This reduction in number of switches decreases the switching losses and the number of driving circuits and reduce the complexity of control circuit. It also reduces the cost and size for the filter used. Analysis and comparison has been done among the conventional topologies (neutral clamped and cascade H-bridge multilevel inverters) with the proposed inverter topology. The analysis includes the total harmonic distortion THD, efficiency and overall performance of the inverter systems. The simulation and analysis have been done using MATLAB/ SIMULINK. The results show good performance for the proposed topology in comparison with the conventional topologies.


2018 ◽  
Vol 2018 ◽  
pp. 1-9 ◽  
Author(s):  
Muhammad Bilal Satti ◽  
Ammar Hasan ◽  
Mian Ilyas Ahmad

The demand for clean and sustainable energy has spurred research in all forms of renewable energy sources, including solar energy from photovoltaic systems. Grid-connected photovoltaic systems (GCPS) provide an effective solution to integrate solar energy into the existing grid. A key component of the GCPS is the inverter. The inverter can have a significant impact on the overall performance of the GCPS, including maximum power point (MPP) tracking, total harmonic distortion (THD), and efficiency. Multilevel inverters are one of the most promising classes of converters that offer a low THD. In this paper, we propose a new multilevel inverter topology with the motivation to improve all the three aforementioned aspects of performance. The proposed topology is controlled through direct model predictive control (DMPC), which is state of the art in control techniques. We compare the performance of the proposed topology with the topologies reported in literature. The proposed topology offers one of the best efficiency, MPP tracking, and voltage THD.


2018 ◽  
Vol 69 (3) ◽  
pp. 233-238
Author(s):  
Cajethan M. Nwosu ◽  
Cosmas U. Ogbuka ◽  
Stephen E. Oti

Abstract An analysis, design and simulation of digital controlled symmetrical seven levels inverter is presented in this paper. Against the contemporary use of two asymmetrical DC sources with two H-bridge cells to generate seven levels inverter two DC sources of equal voltage ratings are used through digital control strategy to realize seven levels output voltage. By utilizing limited number of active switching components and avoiding the usual complex PWM control techniques for multilevel inverters by way of digital control strategy, high efficiency multilevel inverter systems due to reduction in total harmonic distortion and switching losses is guaranteed. Owing to symmetry of the H-bridge cells, a simple and single programmed counter built around J-K flip is required irrespective of number of cascades. The analyzed and designed system has been simulated in MATLAB/SIMULINK environment. With an R-L load of 200 Ω and 200 mH, improved total harmonic distortions (THDs) for the inverter current and voltage are 7.59% and 16.89% respectively. The obtained results show that the control-circuit-based multilevel inverter topology is most suited for applications in solar powered inverter systems.


Author(s):  
S. Nagaraja Rao ◽  
D. V. Ashok Kumar ◽  
Ch. Sai Babu

In this paper, a cascaded based reversing voltage (CBRV) multilevel inverter structure is proposed inorder to compensate the major drawbacks in the conventional multilevel inverters. The proposed topology requires less number of components, less carrier signals and gate drives when compared to existing multilevel inverters particularly at higher levels. Therefore, the complexity and overall cost are greatly reduced particularly for higher output voltage levels. This paper also presents the most relevant control and modulation methods by a triangular based multi carrier pulse width modulation (PWM) scheme for the proposed CBRV inverter topology. This paper presents a comparison between different modulation strategies for CBRV inverter topology based on sinusoidal and space vector references with multi triangular carrier waves. The work strive hard to present the scrutiny that has been made between various PWM control techniques for 1–Ф seven level CBRV inverter structure. The comparison is made in terms of Total Harmonic Distortion (THD) and fundamental RMS voltage. Finally, the simulation results are included to verify the effectiveness of the proposed CBRV inverter topology and validate the proposed theory. A hardware set up was developed for a 1–Ф seven level CBRV inverter topology using FPGA based pulse generation.


Author(s):  
Wail Ali Ali Saleh ◽  
Nurul Ain Mohd Said ◽  
Wahidah Abd Halim

Multilevel inverters are gaining special interest among researchers and in the industry due to their widespread applications and numerous merits. Obtaining high quality, more reliable output while using a reduced number of electronic components is the main purpose of most of the research conducted in this area of study. The purpose of this study is to apply the nearest level control (NLC) method to a 13-level transistor-clamped H-bridge (TCHB) inverter with unequal DC voltage supplies. The NLC method operates at the fundamental frequency, thus reducing switching losses, and can reduce the harmonic content significantly. The adopted multilevel inverter consists of two TCHB cells supplied with two asymmetrical DC input sources with a voltage ratio of 1:2. This structure reduces the number of electronic components, and the asymmetry in the DC input voltages results in a higher number of levels. The adopted topology and its proposed control method were simulated in Matlab/Simulink, and the simulation results were verified through experiments using an Altera field-programmable gate array (FPGA) board. The results showed that the topology and its control method are efficient in obtaining a high-quality output with an improved total harmonic distortion (THD).


Author(s):  
Sujitha N. ◽  
Partha Sarathi Subudhi ◽  
Krithiga S. ◽  
Angalaeswari S. ◽  
Deepa T. ◽  
...  

A grid tied photovoltaic system using modular multilevel inverter topology is proposed in this paper. Basic unit structure of modular multilevel inverter used in this system is capable of converting DC power from PV array to AC power for feeding power to the household loads or utility grid. The proposed modular multilevel inverter structure has lesser power electronic devices compared to the existing multilevel inverter topologies. The proposed system generates a nearly sinusoidal signal and achieves better output profile with low total harmonic distortion. Simulation of the proposed system is carried out in MATLAB/Simulink software and the results are presented.


2018 ◽  
Vol 7 (4.5) ◽  
pp. 379 ◽  
Author(s):  
Rohit Kumar ◽  
Shimi S.L ◽  
Shivendra Kaura

The demand of quality power is increasing continuously. The problem of global warming and rate of decrease of non-renewable energy sources are increasing day by day. Hence renewable energy sources such as fuel cell, solar, Magneto hydro Dynamic (MHD), geothermal are the best alternatives to solve the problem of environmental issue and increasing demand of energy.  The output of these resources is dc, therefore to connect these resources to the grid, multilevel inverter is the key device. But the output of multilevel inverter has power quality issues such as harmonic generation and notching due to conversion of dc to ac and high number of switch. Hence, this paper deals with harmonic elimination using Genetic Algorithm based Selective Harmonic Elimination (GA-SHE) techniques for asymmetric and symmetric topology of MLI. In the present study, comparative study among the 5-level, 7-level, 9-level, 11-level and 15-level multilevel inverters with reduced number of switches topologies has been discussed. A novel topology of 15-level inverter which consists least number of switches has been designed for a desired voltage level. Also, the comparison of Total harmonic distortion developed in the output voltage generated by different topology at different levels with the proposed 15-level inverter topology are discussed. 


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