scholarly journals Vertically-Aligned Multi-Walled Carbon Nano Tube Pillars with Various Diameters under Compression: Pristine and NbTiN Coated

Nanomaterials ◽  
2020 ◽  
Vol 10 (6) ◽  
pp. 1189
Author(s):  
Amir Mirza Gheitaghy ◽  
René H. Poelma ◽  
Leandro Sacco ◽  
Sten Vollebregt ◽  
Guo Qi Zhang

In this paper, the compressive stress of pristine and coated vertically-aligned (VA) multi-walled (MW) carbon nanotube (CNT) pillars were investigated using flat-punch nano-indentation. VA-MWCNT pillars of various diameters (30–150 µm) grown by low-pressure chemical vapor deposition on silicon wafer. A conformal brittle coating of niobium-titanium-nitride with high superconductivity temperature was deposited on the VA-MWCNT pillars using atomic layer deposition. The coating together with the pillars could form a superconductive vertical interconnect. The indentation tests showed foam-like behavior of pristine CNTs and ceramic-like fracture of conformal coated CNTs. The compressive strength and the elastic modulus for pristine CNTs could be divided into three regimes of linear elastic, oscillatory plateau, and exponential densification. The elastic modulus of pristine CNTs increased for a smaller pillar diameter. The response of the coated VA-MWCNTs depended on the diffusion depth of the coating in the pillar and their elastic modulus increased with pillar diameter due to the higher sidewall area. Tuning the material properties by conformal coating on various diameter pillars enhanced the mechanical performance and the vertical interconnect access (via) reliability. The results could be useful for quantum computing applications that require high-density superconducting vertical interconnects and reliable operation at reduced temperatures.

2011 ◽  
Vol 1283 ◽  
Author(s):  
Nicolo’ Chiodarelli ◽  
Annelies Delabie ◽  
Sugiura Masahito ◽  
Yusaku Kashiwagi ◽  
Olivier Richard ◽  
...  

ABSTRACTBecause of their superior electronic properties and bottom-up growth mode, Carbon Nanotubes (CNT) may offer a valid alternative for high aspect ratio vertical interconnects in future generations of microchips. For being successful, though, CNT based interconnects must reach sufficiently low values of resistance to become competitive with current W or Cu based technologies. This essentially means that CMOS compatible processes are needed to produce dense CNT shells of extremely high quality with almost ideal contacts. Moreover, their electrical properties must be preserved at every process step in the integration of CNT into vertical interconnect structures. In this work this latter aspect is analyzed by studying the changes in the electrical characteristics when encapsulating CNT into different oxides. Oxide encapsulation is often exploited to hold the CNT in place and to avoid snapping during a polishing step. On the other hand, oxide encapsulation can influence the properties of the grown CNT which are directly exposed to possibly harmful oxidative conditions. Two different deposition techniques and oxides were evaluated: Chemical Vapor Deposition (CVD) of SiO2 (reference) and Atomic Layer Deposition (ALD) of Al2O3 in less aggressive oxidizing conditions. The two processes were transferred to CNT interconnect test structures on 200mm wafers and electrically benchmarked. The CNT resistance was measured in function of the CNT length which allows the extraction and individual distinction of the resistive contributions of the CNT and the contacts. It is shown that the encapsulating SiO2 deposited by CVD degrades the resistance of CNT by altering their quality. Directions for future improvements have been identified and discussed.


2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Pejman Ghelich ◽  
Nicholas F. Nolta ◽  
Martin Han

AbstractSilicon-based implantable neural devices have great translational potential as a means to deliver various treatments for neurological disorders. However, they are currently held back by uncertain longevity following chronic exposure to body fluids. Conventional deposition techniques cover only the horizontal surfaces which contain active electronics, electrode sites, and conducting traces. As a result, a vast majority of today’s silicon devices leave their vertical sidewalls exposed without protection. In this work, we investigated two batch-process silicon dioxide deposition methods separately and in combination: atomic layer deposition and inductively-coupled plasma chemical vapor deposition. We then utilized a rapid soak test involving potassium hydroxide to evaluate the coverage quality of each protection strategy. Focused ion beam cross sectioning, scanning electron microscopy, and 3D extrapolation enabled us to characterize and quantify the effectiveness of the deposition methods. Results showed that bare silicon sidewalls suffered the most dissolution whereas ALD silicon dioxide provided the best protection, demonstrating its effectiveness as a promising batch process technique to mitigate silicon sidewall corrosion in chronic applications.


2015 ◽  
Vol 1117 ◽  
pp. 98-101
Author(s):  
Rangga Winantyo ◽  
Djoko Hartanto ◽  
Kenji Murakami

Kim et al. suggest that replacing ZnO particle with ZnO vertically aligned nanorods shows much higher energy conversion efficiency [1]. The difference between nanoparticles and nanorods can be seen on figure 1. Yet, vertically aligned nanorods can be grown through the difficult and expensive methods. Pomar et al. reported the growing through atomic layer deposition (ALD) method [2]. Jeong et al. grew the vertically aligned nanorods using metal-organic chemical vapor deposition (MOCVD) method with really high temperature (700-900oC) [3]. When the nanorods are applied for DSSCs, synthesizing really fine nanorods is not necessary. Lee et al. managed to grow nanorods on the seed layer for DSSC application which was post-annealed at 500-600oC [4]. Hu et al. reported vertically aligned nanorods using low temperature chemical bath method, but the deposition time is between 3 hours and 6 days [5].


2021 ◽  
Vol 16 (1) ◽  
Author(s):  
Hongyan Xu ◽  
Mohammad Karbalaei Akbari ◽  
Serge Zhuiykov

AbstractTwo-dimensional (2D) semiconductors beyond graphene represent the thinnest stable known nanomaterials. Rapid growth of their family and applications during the last decade of the twenty-first century have brought unprecedented opportunities to the advanced nano- and opto-electronic technologies. In this article, we review the latest progress in findings on the developed 2D nanomaterials. Advanced synthesis techniques of these 2D nanomaterials and heterostructures were summarized and their novel applications were discussed. The fabrication techniques include the state-of-the-art developments of the vapor-phase-based deposition methods and novel van der Waals (vdW) exfoliation approaches for fabrication both amorphous and crystalline 2D nanomaterials with a particular focus on the chemical vapor deposition (CVD), atomic layer deposition (ALD) of 2D semiconductors and their heterostructures as well as on vdW exfoliation of 2D surface oxide films of liquid metals.


Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 338
Author(s):  
Hak Hyeon Lee ◽  
Dong Su Kim ◽  
Ji Hoon Choi ◽  
Young Been Kim ◽  
Sung Hyeon Jung ◽  
...  

An effective strategy for improving the charge transport efficiency of p-type Cu2O photocathodes is the use of counter n-type semiconductors with a proper band alignment, preferably using Al-doped ZnO (AZO). Atomic layer deposition (ALD)-prepared AZO films show an increase in the built-in potential at the Cu2O/AZO interface as well as an excellent conformal coating with a thin thickness on irregular Cu2O. Considering the thin thickness of the AZO overlayers, it is expected that the composition of the Al and the layer stacking sequence in the ALD process will significantly influence the charge transport behavior and the photoelectrochemical (PEC) performance. We designed various stacking orders of AZO overlayers where the stacking layers consisted of Al2O3 (or Al) and ZnO using the atomically controlled ALD process. Al doping in ZnO results in a wide bandgap and does not degrade the absorption efficiency of Cu2O. The best PEC performance was obtained for the sample with an AZO overlayer containing conductive Al layers in the bottom and top regions. The Cu2O/AZO/TiO2/Pt photoelectrode with this overlayer exhibits an open circuit potential of 0.63 V and maintains a high cathodic photocurrent value of approximately −3.2 mA cm−2 at 0 VRHE for over 100 min.


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