Design of General ATS Software Platform Based on Components

2014 ◽  
Vol 532 ◽  
pp. 264-267
Author(s):  
Su Min Guo ◽  
Ke Bao Xu ◽  
Chun Jian Su ◽  
Yan Fang Liu
Keyword(s):  
Resource Management ◽  
Core Layer ◽  
Test System ◽  
Object Oriented Programming ◽  
Software Platform ◽  
Test Program ◽  
Automatic Test System ◽  
Hardware Resource ◽  
Important Direction ◽  
The Stability

Generality is an important direction for Automatic Test System (ATS) ,while general software platform is the key technology to realize general ATS. Object-oriented programming design ideas and hierarchical and modular structure of the program have been adopted ,achieving the separation of data processing and testing processes; "Software backplane + Component" general software architecture has been used to achieve "the stability of the core layer, general, component layer configurable, scalable"; non-coding type of test program development way is used to achieve the development of test programs assembled . In order to make the hardware resource management centralized in the testing system, test resource management server is designed on the platform, which can put the hardware and software resources into service to achieve the equipments transferring. The results provide that the software platform can improve the development efficiency of test program and also maintenance costs are reduced.

The Design and Implement of Signal Oriented Self-Test Program

2014 ◽  
Vol 644-650 ◽  
pp. 1107-1110
Author(s):  
Feng Qin Wang ◽  
Xiao Feng Lv ◽  
Yu Liu
Keyword(s):  
Program Design ◽  
Test System ◽  
The Self ◽  
Software Platform ◽  
Automatic Test ◽  
Test Program ◽  
Signal Process ◽  
Automatic Test System ◽  
Specific Instrument ◽  
Self Test

Signal-oriented test is care for the signal process without regard of the specific instrument, while the self-test program of Automatic Test System has to test and verify the specific instrument. We put forward the Abbreviated Test Language for All Systems self-test program design and the implement method on GPTS3.1 software platform. Achieving results show that the method performs self-test well.

Research and Realization on IVI Driver

2013 ◽  
Vol 760-762 ◽  
pp. 906-910
Author(s):  
Zhi Li ◽  
Huo Zhang ◽  
Wang Chun Zhu
Keyword(s):  
Test System ◽  
Automatic Test ◽  
Test Program ◽  
Automatic Test System ◽  
The Right ◽  
Programming Interface ◽  
Test Result

As an important part of LXI instruments, IVI driver provides instruments a unified programming interface. It brings convenience to the development and maintenance of automatic test system, and meets the requirements of LXI bus for instrument interchangeability. IVI driver architecture and implementations based on IVICOM are analyzed. An IVI-COM driver of a LXI instrument is designed and implemented, and a test program for this IVI-COM is built. Test result shows the right functions and interchangeability of the designed IVI COM driver.

High Pressure Pneumatic Control Valve Performance Test System

2013 ◽  
Vol 579-580 ◽  
pp. 295-299
Author(s):  
Xu Dong Pan ◽  
Guang Lin Wang ◽  
Guo Yu Shen ◽  
Rui Qi Song
Keyword(s):  
Performance Test ◽  
Control Valve ◽  
Test System ◽  
Normal Operation ◽  
Direct Influence ◽  
Pneumatic Control ◽  
Automatic Test System ◽  
Specialized Software ◽  
Control Precision ◽  
The Stability

As a pressure regulating component, pneumatic control valve has been widely used in control system. The stability of its performance not only concerns the control precision, but also has direct influence on the systems normal operation. Thus, a test on the valves characteristics before putting into use is rather important. According to analysis of testing requirements, this paper determined the overall program of this pneumatic measurement system, designed the gas-circuit, provided specialized software for measurement, and developed an automatic test system. The experimental data shows the system is with high precision and can satisfy the needs of valve test well.

Study on Common Ground Testing Platform Technology for Telemetry Core Equipment

2012 ◽  
Vol 220-223 ◽  
pp. 1472-1475
Author(s):  
Qiu Lin Tan ◽  
Xiang Dong Pei ◽  
Si Min Zhu ◽  
Ji Jun Xiong
Keyword(s):  
Data Exchange ◽  
Common Ground ◽  
Digital Signal ◽  
Test System ◽  
Automatic Test System ◽  
Module Design ◽  
The Status ◽  
Output Module ◽  
And Performance ◽  
Hardware Circuit

On the basis of automatic test system of the status in domestic and foreign, by analysis of the various functions and performance of the integrated test system, a design of the integrated test system is proposed, FPGA as the core logic controller of the hardware circuit. The system of the hardware design include: digital signal source output modules, analog output module and PCM codec module. Design of hardware circuit are mainly described. In addition, a detailed analysis of some key technologies in the design process was given. Overall, its data exchange with host computer is through the PCI card, data link and bandwidth can be expanded in accordance with the actual needs. The entire system designed in the modular principle, which has a strong scalability.

scholarly journals Automatic test system of the back-end card for the JUNO experiment

2021 ◽  
pp. 1-1
Author(s):  
Barbara Clerbaux ◽  
Shuang Hang ◽  
Pierre-Alexandre Petitjean ◽  
Peng Wang ◽  
Yifan Yang
Keyword(s):  
Test System ◽  
Automatic Test ◽  
Automatic Test System

scholarly journals Operating System for Runtime Reconfigurable Multiprocessor Systems

2011 ◽  
Vol 2011 ◽  
pp. 1-16 ◽  
Author(s):  
Diana Göhringer ◽  
Michael Hübner ◽  
Etienne Nguepi Zeutebouo ◽  
Jürgen Becker
Keyword(s):  
Operating System ◽  
Resource Management ◽  
Multiprocessor System ◽  
Task Mapping ◽  
Access Port ◽  
Novel Approach ◽  
Hardware Resource ◽  
Hardware Architectures ◽  
On Chip ◽  
Internal Configuration

Operating systems traditionally handle the task scheduling of one or more application instances on processor-like hardware architectures. RAMPSoC, a novel runtime adaptive multiprocessor System-on-Chip, exploits the dynamic reconfiguration on FPGAs to generate, start and terminate hardware and software tasks. The hardware tasks have to be transferred to the reconfigurable hardware via a configuration access port. The software tasks can be loaded into the local memory of the respective IP core either via the configuration access port or via the on-chip communication infrastructure (e.g. a Network-on-Chip). Recent-series of Xilinx FPGAs, such as Virtex-5, provide two Internal Configuration Access Ports, which cannot be accessed simultaneously. To prevent conflicts, the access to these ports as well as the hardware resource management needs to be controlled, e.g. by a special-purpose operating system running on an embedded processor. For that purpose and to handle the relations between temporally and spatially scheduled operations, the novel approach of an operating system is of high importance. This special purpose operating system, called CAP-OS (Configuration Access Port-Operating System), which will be presented in this paper, supports the clients using the configuration port with the services of priority-based access scheduling, hardware task mapping and resource management.

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