scholarly journals Realization and opto-electronic Characterization of linear Self-Reset Pixel Cells for a high dynamic CMOS Image Sensor

2019 ◽  
Vol 17 ◽  
pp. 239-247 ◽  
Author(s):  
Stefan Hirsch ◽  
Markus Strobel ◽  
Wolfram Klingler ◽  
Jan Dirk Schulze Spüntrup ◽  
Zili Yu ◽  
...  

Abstract. Conventional CMOS image sensors with a linear transfer characteristic only have a limited dynamic range (DR) of about 60–70 dB. To extend the dynamic range considerably, the already successfully demonstrated concept of a linear self-reset pixel was employed in this work. With the self-reset concept the limit of the maximum analyzable photo generated charge (Qmax⁡) during the exposure time is extended to a multiple of the saturation charge of the photo diode (Qsat) by asynchronous self-resets of the photo diode. Additionally, the remaining charge at the end of the exposure time is evaluated to increase the resolution of the opto-electronic conversion. Thus we achieved pixels with a DR of more than 120 dB combined with an improved low light sensitivity using a pinned photodiode. This paper focuses on two topics: One is the realization and opto-electronic characterization of further self-reset pixel cells for an experimental optimization of the functionality with respect to linearity and high signal-to-noise ratio. The second one is the assembly and digital readout of a cluster structure composed of 16 × 16 pixel matrix on a CMOS test chip. One constraint for later usage of the pixel cells in a high resolution (> VGA) image sensor is the required layout area of the individual circuit blocks. For the cluster structure a size of 20 × 20 µm2 for the analog part of the pixel containing the photo diode and the other analog circuit blocks, the comparator and the signal shaping, was desired. The circuit design and layout work included several variants of the pinned photo diode with floating diffusion (FD) readout node, which is also used for analog voltage storage, and different control transistors. Further for the comparator a telescopic differential amplifier with high gain was implemented as well as peripheral 10 bit counter/shift register as static and dynamic versions. Test chips have been fabricated in an advanced 0.18 µm CMOS technology for optical sensors with low leakage currents. The sensor chips have been evaluated with a specifically developed test setup which gives the flexibility to arbitrarily generate the digital and analog control signals in terms of timing and voltage levels. Based on this, the number of asynchronous self-resets could be read out from the counters of the pixel cells as coarse values. The remaining charge at the end of the integration time was digitized using a ramp analog to digital conversion and could be read out as fine values. An opto-electronic characterization with adjustable illumination from 0 lx to 13 klx was done to measure and analyze the opto-electronic conversion function (OECF) and the noise of six different self-reset pixel cells having the high-gain differential amplifier as comparator. Finally the coarse values of two implemented 16 × 16 pixel clusters could be read out as a mini camera using a lens for optical image formation.

Author(s):  
G Vasudeva ◽  
Uma B. V.

Differential Amplifier is a primary building block of analog and mixed signal circuit for pre-processing and signal conditioning of analog signal. FINFET devices with high-k gate oxide at 22nm technology are predominantly used for high speed and low power complex VLSI circuits. FINFET based differential amplifiers are widely used in ADC’s and signal Processing applications due to their advantages in terms of power dissipation. Analog front end of complex VLSI circuits need to offer high gain, higher stability and low noise figure. Designing of FINFET based VLSI sub-circuits requires proper design procedure that can provide designers flexibility in controlling the circuit performances. In this paper, differential amplifier is designed using model parameters of high-k FINFET in 22nm technology. The conventional procedures for designing MOSFET based differential amplifier are modified for designing FINFET based differential amplifier. Schematic capture is carried out in Cadence environment and simulations are obtained considering 22nm FINFET PDK. The performance metrics are evaluated and optimized considering multiple iterations. The designed differential amplifier has slew rate of 6V/µSec and settling time of 0.9 µSec which is a desired metric for ADCs. Power Supply Rejection Ratio (PSRR) is 83 dB and dynamic range is 1.6754 V. Open loop DC gain of DA is achieved to be 103 dB with phase margin of 630 that demonstrates the advantages of DA designed in this work suitable for analog front end


Author(s):  
Jong-ho Park ◽  
Mitsuhito Mase ◽  
Shoji Kawahito ◽  
Masaaki Sasaki ◽  
Yasuo Wakamori ◽  
...  

2020 ◽  
Vol 2020 (7) ◽  
pp. 143-1-143-6 ◽  
Author(s):  
Yasuyuki Fujihara ◽  
Maasa Murata ◽  
Shota Nakayama ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa

This paper presents a prototype linear response single exposure CMOS image sensor with two-stage lateral overflow integration trench capacitors (LOFITreCs) exhibiting over 120dB dynamic range with 11.4Me- full well capacity (FWC) and maximum signal-to-noise ratio (SNR) of 70dB. The measured SNR at all switching points were over 35dB thanks to the proposed two-stage LOFITreCs.


2007 ◽  
Author(s):  
Koichi Mizobuchi ◽  
Satoru Adachi ◽  
Tomokazu Yamashita ◽  
Seiichiro Okamura ◽  
Hiromichi Oshikubo ◽  
...  

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