scholarly journals Design and Fabrication of 32x32 Foveated CMOS Retina Chip for Edge Detection with Local-Light Adaptation

2002 ◽  
Vol 11 (2) ◽  
pp. 84-92
Keyword(s):  
Edge Detection ◽  
Light Adaptation ◽  
Retina Chip

A foveated-structure CMOS retina chip for edge detection with local light adaptation

2003 ◽  
Vol 108 (1-3) ◽  
pp. 75-80 ◽  
Author(s):  
Dae-Sik Park ◽  
Jung-Hwan Kim ◽  
Hyun-Soo Kim ◽  
Jong-Ho Park ◽  
Jang-Kyoo Shin ◽  
...  
Keyword(s):  
Edge Detection ◽  
Light Adaptation ◽  
Retina Chip

Difference mode EXELFS with parallel-detection EELS

1992 ◽  
Vol 50 (2) ◽  
pp. 1262-1263
Author(s):  
Michael K. Kundmann ◽  
Ondrej L. Krivanek
Keyword(s):  
Edge Detection ◽  
Important Distinction ◽  
Edge Structure ◽  
Parallel Detection ◽  
Gain Variation ◽  
Ideal Solutions ◽  
Detector Cell ◽  
The Difference ◽  
Elemental Detection ◽  
Partial Correction

Parallel detection has greatly improved the elemental detection sensitivities attainable with EELS. An important element of this advance has been the development of differencing techniques which circumvent limitations imposed by the channel-to-channel gain variation of parallel detectors. The gain variation problem is particularly severe for detection of the subtle post-threshold structure comprising the EXELFS signal. Although correction techniques such as gain averaging or normalization can yield useful EXELFS signals, these are not ideal solutions. The former is a partial throwback to serial detection and the latter can only achieve partial correction because of detector cell inhomogeneities. We consider here the feasibility of using the difference method to efficiently and accurately measure the EXELFS signal.An important distinction between the edge-detection and EXELFS cases lies in the energy-space periodicities which comprise the two signals. Edge detection involves the near-edge structure and its well-defined, shortperiod (5-10 eV) oscillations. On the other hand, EXELFS has continuously changing long-period oscillations (∼10-100 eV).

A Dividing Ratio Changeable Digital PLL Based on Phase State Memory and Double Clock-Edge Detection

2008 ◽  
Vol 128 (7) ◽  
pp. 1185-1190 ◽  
Author(s):  
Kuniaki Fujimoto ◽  
Hirofumi Sasaki ◽  
Mitsutoshi Yahara
Keyword(s):  
Edge Detection ◽  
Phase State
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