A Selection of Lower Bounds for Arithmetic Circuits

2014 ◽  
pp. 77-115 ◽  
Author(s):  
Neeraj Kayal ◽  
Ramprasad Saptharishi
Keyword(s):  
Lower Bounds ◽  
Arithmetic Circuits ◽  
Selection Of

scholarly journals Uniform derandomization from pathetic lower bounds

2012 ◽  
Vol 370 (1971) ◽  
pp. 3512-3535 ◽  
Author(s):  
Eric Allender ◽  
V. Arvind ◽  
Rahul Santhanam ◽  
Fengming Wang
Keyword(s):  
Word Problem ◽  
Lower Bounds ◽  
Black Box ◽  
Arithmetic Circuits ◽  
List Type ◽  
Probabilistic Algorithms ◽  
Constant Depth ◽  
Subexponential Time ◽  
Polynomial Size ◽  
Threshold Circuits

The notion of probabilistic computation dates back at least to Turing, who also wrestled with the practical problems of how to implement probabilistic algorithms on machines with, at best, very limited access to randomness. A more recent line of research, known as derandomization, studies the extent to which randomness is superfluous. A recurring theme in the literature on derandomization is that probabilistic algorithms can be simulated quickly by deterministic algorithms, if one can obtain impressive (i.e. superpolynomial, or even nearly exponential) circuit size lower bounds for certain problems. In contrast to what is needed for derandomization, existing lower bounds seem rather pathetic. Here, we present two instances where ‘pathetic’ lower bounds of the form n 1+ ϵ would suffice to derandomize interesting classes of probabilistic algorithms. We show the following: — If the word problem over S 5 requires constant-depth threshold circuits of size n 1+ ϵ for some ϵ >0, then any language accepted by uniform polynomial size probabilistic threshold circuits can be solved in subexponential time (and, more strongly, can be accepted by a uniform family of deterministic constant-depth threshold circuits of subexponential size). — If there are no constant-depth arithmetic circuits of size n 1+ ϵ for the problem of multiplying a sequence of n  3×3 matrices, then, for every constant d , black-box identity testing for depth- d arithmetic circuits with bounded individual degree can be performed in subexponential time (and even by a uniform family of deterministic constant-depth AC 0 circuits of subexponential size).

Branch identification and motion domain analysis of Stephenson type six-bar linkages

2007 ◽  
Vol 221 (5) ◽  
pp. 589-604 ◽  
Author(s):  
C-C Tsai ◽  
L-C T Wang
Keyword(s):  
Lower Bounds ◽  
Polynomial Equation ◽  
Domain Analysis ◽  
Upper And Lower Bounds ◽  
Computer Implementation ◽  
Input Output ◽  
Complicated Case ◽  
Sturm Theorem ◽  
The Dead ◽  
Selection Of

A general approach for branch identification and motion domain analysis of Stephenson type six-bar linkages is presented. By applying the Sturm theorem to the input-output polynomial equation, the dead-centre positions of the linkage are first evaluated and classified into two groups in order to discriminate the upper and lower bounds of the motion domains. The circuits of the linkage are then identified by matching the dead centres to the branches, which are attributed in accordance with the case where the input is assigned to a joint within the four-bar chain. Finally, the branches and motion domains of the more complicated case where the input is given through one of the uncoupled joints within the five-bar chain, are identified by mapping the circuits onto the domain of the specified input joint. This approach does not rely on the coupler curve of the constituent four-link mechanism. This is also suitable for computer implementation and can be systematically applied to all types of Stephenson linkages, regardless of the types of joints and the selection of input-output pair.

scholarly journals Lower Bounds for Arithmetic Circuits via the Hankel Matrix

2021 ◽  
Vol 30 (2) ◽  
Author(s):  
Nathanaël Fijalkow ◽  
Guillaume Lagarde ◽  
Pierre Ohlmann ◽  
Olivier Serre
Keyword(s):  
Lower Bounds ◽  
Hankel Matrix ◽  
Arithmetic Circuits

DESIGNING OPTIMIZED IMPRECISE FIXED-POINT ARITHMETIC CIRCUITS SPECIFIED BY POLYNOMIALS WITH VARIOUS CONSTRAINTS

2014 ◽  
Vol 23 (01) ◽  
pp. 1450010 ◽  
Author(s):  
YU PANG ◽  
YAFENG YAN ◽  
JINZHAO LIN ◽  
ZHANGYONG LI ◽  
QIANNENG ZHOU ◽  
...  
Keyword(s):  
Error Bound ◽  
Function Approximation ◽  
Arithmetic Circuits ◽  
Approximation Schemes ◽  
Verification Algorithm ◽  
Multiple Precision ◽  
Simultaneous Selection ◽  
A New Technique ◽  
Point Arithmetic ◽  
Selection Of

Arithmetic circuits in general do not exactly match specifications, leading to different implementations within allowed imprecision. Starting from real-valued representation, such as Taylor series, we propose a new technique based on arithmetic transform (AT) to analyze simultaneous selection of multiple word lengths and even the function approximation schemes, and then derive a verification algorithm to check whether an implementation fits the error bound. To find optimized implementations which both satisfy a given error bound and constraints included interface input, delay and area. An optimization algorithm is derived to explore multiple precision parameters and get the optimized implementations by various constraints.

Lower bounds on arithmetic circuits via partial derivatives

1996 ◽  
Vol 6 (3) ◽  
pp. 217-234 ◽  
Author(s):  
Noam Nisan ◽  
Avi Wigderson
Keyword(s):  
Lower Bounds ◽  
Arithmetic Circuits ◽  
Partial Derivatives

scholarly journals Lower Bounds for Depth-Three Arithmetic Circuits with small bottom fanin

2016 ◽  
Vol 25 (2) ◽  
pp. 419-454 ◽  
Author(s):  
Neeraj Kayal ◽  
Chandan Saha
Keyword(s):  
Lower Bounds ◽  
Arithmetic Circuits

scholarly journals A Compilation of Succinctness Results for Arithmetic Circuits

2021 ◽  
Author(s):  
Alexis de Colnet ◽  
Stefan Mengel
Keyword(s):  
Lower Bounds ◽  
Probabilistic Models ◽  
Probabilistic Reasoning ◽  
Efficient Algorithms ◽  
Arithmetic Circuits ◽  
Boolean Circuits ◽  
Real Numbers ◽  
The Real ◽  
Indicator Variables ◽  
Input Variables

Arithmetic circuits (AC) are circuits over the real numbers with 0/1-valued input variables whose gates compute the sum or the product of their inputs. Positive AC – that is, AC representing non-negative functions – subsume many interesting probabilistic models such as probabilistic sentential decision diagram (PSDD) or sum-product network (SPN) on indicator variables. Efficient algorithms for many operations useful in probabilistic reasoning on these models critically depend on imposing structural restrictions to the underlying AC. Generally, adding structural restrictions yields new tractable operations but increases the size of the AC. In this paper we study the relative succinctness of classes of AC with different combinations of common restrictions. Building on existing results for Boolean circuits, we derive an unconditional succinctness map for classes of monotone AC – that is, AC whose constant labels are non-negative reals – respecting relevant combinations of the restrictions we consider. We extend a small part of the map to classes of positive AC. Those are known to generally be exponentially more succinct than their monotone counterparts, but we observe here that for so-called deterministic circuits there is no difference between the monotone and the positive setting which allows us to lift some of our results. We end the paper with some insights on the relative succinctness of positive AC by showing exponential lower bounds on the representations of certain functions in positive AC respecting structured decomposability.

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