Real-Time FPGA-Based Fault Tolerant and Recoverable Technique for Arithmetic Design Using Functional Triple Modular Redundancy (FRTMR)

2018 ◽  
pp. 491-499 ◽  
Author(s):  
Shubham C. Anjankar ◽  
Ajinkya M. Pund ◽  
Rajesh Junghare ◽  
Jitendra Zalke
Keyword(s):  
Real Time ◽  
Fault Tolerant ◽  
Triple Modular Redundancy ◽  
Modular Redundancy

scholarly journals A Novel Scheme for Fault Tolerant Computing

2021 ◽  
Vol 3 (1) ◽  
pp. 17-23
Author(s):  
Pramode Ranjan Bhattacharjee ◽  
Keyword(s):  
Fault Tolerant ◽  
Present Scheme ◽  
Triple Modular Redundancy ◽  
Test Input ◽  
Digital Network ◽  
Additional Control ◽  
Majority Voter ◽  
Modular Redundancy ◽  
Primary Output

A novel scheme for ensuring reliability in the operation of a combinational digital network has been offered in this paper. This has been achieved by making use of three copies of the same digital network along with two additional sub-networks, one of which consists of three additional control inputs, which can also be used as additional observable outputs. If both the said two sub-networks are fault free, then the primary output of the network in the present scheme will always give fault-free responses even if a fault (single or multiple) occurs in one of the three copies of the digital network under consideration. Unlike the Triple Modular Redundancy (TMR) scheme, the present scheme does not require any majority voter circuit. Furthermore, unlike the TMR scheme, the additional sub-networks in the present scheme can be tested off-line by predefined test input patterns.

scholarly journals A Fault Tolerant Voter for Approximate Triple Modular Redundancy

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 332 ◽  
Author(s):  
Tooba Arifeen ◽  
Abdus Hassan ◽  
Jeong-A Lee
Keyword(s):  
Fault Tolerant ◽  
Triple Modular Redundancy ◽  
Area Overhead ◽  
Final Output ◽  
Working Principle ◽  
Fault Masking ◽  
Internal Faults ◽  
Modular Redundancy ◽  
Power Delay Product

Approximate Triple Modular Redundancy has been proposed in the literature to overcome the area overhead issue of Triple Modular Redundancy (TMR). The outcome of TMR/Approximate TMR modules serves as the voter input to produce the final output of a system. Because the working principle of Approximate TMR conditionally allows one of the approximate modules to differ from the original circuit, it is critical for Approximate TMR that a voter not only be tolerant toward its internal faults but also toward faults that occur at the voter inputs. Herein, we present a novel compact voter for Approximate TMR using pass transistors and quadded transistor level redundancy to achieve a higher fault masking. The design also targets a better Quality of Circuit (QoC), a new metric which we have proposed for highlighting the ability of a circuit to fully mask all possible internal faults for an input vector. Comparing the fault masking features with those of existing works, the proposed voter delivered upto 45.1%, 62.5%, 26.6% improvement in Fault Masking Ratio (FMR), QoC, and reliability, respectively. With respect to the electrical characteristics, our proposed voter can achieve an improvement of up to 50% and 56% in terms of the transistor count and power delay product, respectively.

Low power modular redundancy: a power efficient fault tolerant approach for digital circuits

2016 ◽  
Vol 35 (3) ◽  
Author(s):  
M. Saeed Ansari ◽  
Ali Mahani ◽  
Karim Mohammadi
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Design Methodology ◽  
Digital Circuits ◽  
Fault Tolerant ◽  
Sleep Mode ◽  
Clock Generator ◽  
The Third ◽  
Triple Modular Redundancy ◽  
Modular Redundancy

Purpose To increase protection level against transient faults, circuit designers usually take advantage of redundant structures like Triple Modular Redundancy (TMR). Since redundancy compel a significant power overhead, proposing a low power fault tolerant technique in digital circuits is the main objective of this research work. Design/methodology/approach In order to moderate power consumption, we use a dual to triple modular redundancy. In fact, we put one of the modules in a TMR system in sleep mode while the other two operating modules are producing the same outputs. Once a mismatch is detected, the third one exits the sleep mode and the dual modular redundancy (DMR) approach turns into a conventional TMR. Also a novel stoppable clock generator is proposed to handle the sleep mode of the third module. Finally, a new three-input majority voter, compatible with our proposed technique, is presented. Findings Power analysis of combinational circuit benchmarks, ISCAS85, and ISCAS89 as sequential circuit benchmarks are depicted. Simulation results show the power reduction of up to 30% in comparison with the conventional modular redundancy approach. Originality/value Since modular redundancy is the most effective and the most well-known fault tolerant approach which is widely used in reliable circuits designs, it is important to reduce its power consumption. In this paper configuring the sleep mode operation of a circuit and stoppable clock generator lead to a new TMR technique in which the power consumption is strongly reduced.

scholarly journals Hybrid fault tolerant control for air–fuel ratio control of internal combustion gasoline engine using Kalman filters with advanced redundancy

2019 ◽  
Vol 52 (5-6) ◽  
pp. 473-492 ◽  
Author(s):  
Arslan Ahmed Amin ◽  
Khalid Mahmood-ul-Hasan
Keyword(s):  
Control System ◽  
Kalman Filters ◽  
Active Fault ◽  
Fault Tolerant ◽  
Fault Tolerant Control ◽  
Internal Combustion ◽  
Sensors And Actuators ◽  
Triple Modular Redundancy ◽  
Fuel Ratio ◽  
Modular Redundancy

In this paper, a hybrid fault tolerant control system is proposed for air–fuel ratio control of internal combustion gasoline engines based on Kalman filters and triple modular redundancy. Hybrid fault tolerant control system possesses properties of both active fault tolerant control system and passive fault tolerant control system. As part of active fault tolerant control system, fault detection and isolation unit is designed using Kalman filters to provide estimated values of the sensors to the engine controller in case of faults in the sensors. As part of passive fault tolerant control system, a dedicated proportional–integral feedback controller is incorporated to maintain air–fuel ratio by adjusting the throttle actuator in the fuel supply line in faulty and noisy conditions for robustness to faults and sensors’ noise. Redundancy is proposed in the sensors and actuators as a simultaneous failure of more than one sensor, and failure of the single actuator will cause the engine shutdown. Advanced redundancy protocol triple modular redundancy is proposed for the sensors and dual redundancy is proposed for actuators. Simulation results in the MATLAB Simulink environment show that the proposed system remains stable during faults in the sensors and actuators. It also maintains air–fuel ratio without any degradation in the faulty conditions and is robust to noise. Finally, the probabilistic reliability analysis of the proposed model is carried out. The study shows that the proposed hybrid fault tolerant control system with redundant components presents a novel and highly reliable solution for the air–fuel ratio control in internal combustion engines to prevent engine shutdown and production loss for greater profits.

scholarly journals Dual-Mode FPGA-Based Triple-TDC With Real-Time Calibration and a Triple Modular Redundancy Scheme

Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 607
Author(s):  
Yuan-Ho Chen
Keyword(s):  
Real Time ◽  
Single Mode ◽  
Triple Modular Redundancy ◽  
Mode Operation ◽  
Differential Nonlinearity ◽  
Time Calibration ◽  
Integral Nonlinearity ◽  
Field Programmable ◽  
Modular Redundancy ◽  
Multi Mode

This paper proposes a triple time-to-digital converter (TDC) for a field-programmable gate array (FPGA) platform with dual operation modes. First, the proposed triple-TDC employs the real-time calibration circuit followed by the traditional tapped delay line architecture to improve the environmental effect for the application of multiple TDCs. Second, the triple modular redundancy scheme is used to deal with the uncertainty in the FPGA device for improving the linearity for the application of a single TDC. The proposed triple-TDC is implemented in a Xilinx Virtex-5 FPGA platform and has a time resolution of 40 ps root mean square for multi-mode operation. Moreover, the ranges of differential nonlinearity and integral nonlinearity can be improved by 56 % and 37 % , respectively, for single-mode operation.

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