Tester Memory Requirements and Test Application Time Reduction for Delay Faults with Digital Captureless Test Sensors

2011 ◽  
Vol 28 (2) ◽  
pp. 229-242
Author(s):  
C. Thibeault ◽  
Y. Hariri ◽  
C. Hobeika
Sign in / Sign up

Export Citation Format

Share Document