scholarly journals Efficient hardware structure for extended Euclidean‐based inversion over

2019 ◽  
Vol 13 (4) ◽  
pp. 282-291
Author(s):  
Bahram Rashidi
Keyword(s):  
2013 ◽  
Vol 464 ◽  
pp. 424-428
Author(s):  
Qi Luo

The hardware structure of college students physical activity energy monitor has been designed through electronic circuit method in the previous research. Software Design of college students physical activity energy monitor by using LabVIEW is also proposed. User login module, physiological condition module, movement condition module, diet tracking module, virtual coaches module and other modules are also realized in the paper.


2012 ◽  
Vol 590 ◽  
pp. 361-366
Author(s):  
Fu Qiu ◽  
De Qiang He ◽  
Xiao Yang Yao ◽  
Jian Miao

The locomotive coupling came from the development of heavy-haul transportation in railway. Considering the insufficiencies of cable and radio in locomotive coupling at present, a new method of locomotive coupling is presented in this paper. The overall design of system scheme is provided based on WLAN. The system feasibility is analyzed and verified by using OPNET Modeler. The hardware structure of coupling transmission device and development process of embedded operating system are described briefly. Finally, taking measures guarantees the system reliability of data transmission.


Author(s):  
A. B. Fontaine ◽  
F. Barrand
Keyword(s):  

2013 ◽  
Vol 709 ◽  
pp. 449-452
Author(s):  
Jun Kai Yang

t proposes a tachometer program that consists of AT89S52 microcontroller and Hall sensor. The tachometer is based on acquisition of pulse signal issued by Hall sensor and microcontroller count. Then, after the data calculation, analysis, and treatment by internal program, real-time speed can be displayed through LED. The tachometer has advantages, such as simple hardware structure, high measurement speed, high precision, and simple operation.


2012 ◽  
Vol 2012 ◽  
pp. 1-10 ◽  
Author(s):  
Christoph Starke ◽  
Vasco Grossmann ◽  
Lars Wienbrandt ◽  
Sven Koschnicke ◽  
John Carstens ◽  
...  

The hardware structure of a processing element used for optimization of an investment strategy for financial markets is presented. It is shown how this processing element can be multiply implemented on the massively parallel FPGA-machine RIVYERA. This leads to a speedup of a factor of about 17,000 in comparison to one single high-performance PC, while saving more than 99% of the consumed energy. Furthermore, it is shown for a special security and different time periods that the optimized investment strategy delivers an outperformance between 2 and 14 percent in relation to a buy and hold strategy.


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