A 200 MHz steered current operational amplifier in 1.2-μm CMOS technology

1997 ◽  
Vol 32 (2) ◽  
pp. 245-249 ◽  
Author(s):  
E. Abou-Allam ◽  
E.I. El-Masry
2019 ◽  
Vol 28 (03) ◽  
pp. 1950052
Author(s):  
Ali Safari ◽  
Massoud Dousti ◽  
Mohammad Bagher Tavakoli

Graphene Field Effect Transistor (GFET) is a promising candidate for future high performance applications in the beyond CMOS roadmap for analog circuit applications. This paper presents a Verilog-A implementation of a monolayer graphene field-effect transistor (mGFET) model. The study of characteristic curves is carried out using advanced design system (ADS) tools. Validation of the model through comparison with measurements from the characteristic curves is carried out using Silvaco TCAD tools. Finally, the mGFET is used to design a GFET-based operational amplifier (Op-Amp). The GFET Op-Amp performances are tuned in term of the graphene channel length in order to obtain a reasonable gain and bandwidth. The main characteristics of the Op-Amp performance are compared with 0.18[Formula: see text][Formula: see text]m CMOS technology.


2020 ◽  
Vol 14 (2) ◽  
pp. 251-259 ◽  
Author(s):  
Yang Wang ◽  
Liqiang Ding ◽  
Zhanying Bao ◽  
Hongjiao Yang ◽  
Xiangliang Jin

2020 ◽  
Vol 10 (1) ◽  
pp. 399 ◽  
Author(s):  
Kwonsang Han ◽  
Hyungseup Kim ◽  
Jaesung Kim ◽  
Donggeun You ◽  
Hyunwoo Heo ◽  
...  

This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 µA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/√Hz, respectively.


2020 ◽  
Vol 140 (1) ◽  
pp. 9-15
Author(s):  
Koken Chin ◽  
Mamoru Ohsawa ◽  
Atsushi Kitajima ◽  
Yoshiaki Arai ◽  
Jun Yamashita ◽  
...  

1994 ◽  
Vol 30 (13) ◽  
pp. 1042-1043 ◽  
Author(s):  
E. Abou-Allam ◽  
E.I. El-Masry

2020 ◽  
Author(s):  
Lee Cha Sing ◽  
N. Ahmad ◽  
M. Mohamad Isa ◽  
F. A. S. Musa

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