Input Bias Current Reduction Technique for Operational Amplifier in a Standard CMOS Technology

A new technique for reducing the offset of latch-type sense amplifier has been proposed and effect of enable signal voltage upon latch-type sense amplifier offset in SRAM has been investigated in this paper. Circuit simulation results on both StrongARM and Double-tail topologies show that the standard deviation of offset can be reduced by 31.23% (StrongARM SA) and 25.2% (Double-tail SA) , respectively, when the voltage of enable signal reaches 0.6V in TSMC 65nm CMOS technology. For a column of bit-cell (1024 bit-cell), the total speed is improved by 14.98% (StrongARAM SA) and 22.26% (Double-tail SA) at the optimal operation point separately, and the total energy dissipation is reduced by 30.45% and 29.47% with this scheme.

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An inrush current reduction technique for the line-interactive uninterruptible power supply systems

IECON 2013 - 39th Annual Conference of the IEEE Industrial Electronics Society ◽

10.1109/iecon.2013.6699174 ◽

2013 ◽

Cited By ~ 1

Author(s):

Syed Sabir Hussain Bukhari ◽

Thomas A. Lipo ◽

Byung-il Kwon

Keyword(s):

Power Supply ◽

Reduction Technique ◽

Inrush Current ◽

Uninterruptible Power Supply ◽

Uninterruptible Power ◽

Current Reduction ◽

Supply Systems

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RESET Current Reduction for Phase Change Memory Based on Standard 0.13-μm CMOS Technology

Procedia Engineering ◽

10.1016/j.proeng.2011.08.1102 ◽

2011 ◽

Vol 16 ◽

pp. 401-406

Author(s):

CHEN Yifeng ◽

SONG Zhitang ◽

CHEN Xiaogang ◽

LIU Bo ◽

FENG Gaoming ◽

...

Keyword(s):

Phase Change ◽

Phase Change Memory ◽

Cmos Technology ◽

Current Reduction ◽

Change Memory

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Monolayer Graphene Field Effect Transistor-Based Operational Amplifier

Journal of Circuits System and Computers ◽

10.1142/s021812661950052x ◽

2019 ◽

Vol 28 (03) ◽

pp. 1950052

Author(s):

Ali Safari ◽

Massoud Dousti ◽

Mohammad Bagher Tavakoli

Keyword(s):

Operational Amplifier ◽

Field Effect ◽

Field Effect Transistor ◽

Cmos Technology ◽

Design System ◽

Monolayer Graphene ◽

Characteristic Curves ◽

Op Amp ◽

Graphene Field Effect Transistor ◽

Effect Transistor

Graphene Field Effect Transistor (GFET) is a promising candidate for future high performance applications in the beyond CMOS roadmap for analog circuit applications. This paper presents a Verilog-A implementation of a monolayer graphene field-effect transistor (mGFET) model. The study of characteristic curves is carried out using advanced design system (ADS) tools. Validation of the model through comparison with measurements from the characteristic curves is carried out using Silvaco TCAD tools. Finally, the mGFET is used to design a GFET-based operational amplifier (Op-Amp). The GFET Op-Amp performances are tuned in term of the graphene channel length in order to obtain a reasonable gain and bandwidth. The main characteristics of the Op-Amp performance are compared with 0.18[Formula: see text][Formula: see text]m CMOS technology.

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A 24.88 nV/√Hz Wheatstone Bridge Readout Integrated Circuit with Chopper-Stabilized Multipath Operational Amplifier

Applied Sciences ◽

10.3390/app10010399 ◽

2020 ◽

Vol 10 (1) ◽

pp. 399 ◽

Cited By ~ 1

Author(s):

Kwonsang Han ◽

Hyungseup Kim ◽

Jaesung Kim ◽

Donggeun You ◽

Hyunwoo Heo ◽

...

Keyword(s):

Integrated Circuit ◽

Operational Amplifier ◽

Wheatstone Bridge ◽

Input Resistance ◽

Cmos Technology ◽

Low Noise ◽

Oxide Semiconductor ◽

Instrumentation Amplifier ◽

Readout Integrated Circuit ◽

Chopper Stabilization

This paper proposes a low noise readout integrated circuit (IC) with a chopper-stabilized multipath operational amplifier suitable for a Wheatstone bridge sensor. The input voltage of the readout IC changes due to a change in input resistance, and is efficiently amplified using a three-operational amplifier instrumentation amplifier (IA) structure with high input impedance and adjustable gain. Furthermore, a chopper-stabilized multipath structure is applied to the operational amplifier, and a ripple reduction loop (RRL) in the low frequency path (LFP) is employed to attenuate the ripple generated by the chopper stabilization technique. A 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) is employed to convert the output voltage of the three-operational amplifier IA into digital code. The Wheatstone bridge readout IC is manufactured using a standard 0.18 µm complementary metal-oxide-semiconductor (CMOS) technology, drawing 833 µA current from a 1.8 V supply. The input range and the input referred noise are ±20 mV and 24.88 nV/√Hz, respectively.

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First principle leakage current reduction technique for CMOS devices

2015 International Conference on Computing, Communication and Security (ICCCS) ◽

10.1109/cccs.2015.7374165 ◽

2015 ◽

Cited By ~ 1

Author(s):

Hippolyte Djonon Tsague ◽

Bhekisipho Twala

Keyword(s):

Leakage Current ◽

Reduction Technique ◽

First Principle ◽

Current Reduction

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Current Controlled Differential Difference Current Conveyor Transconductance Amplifier and Its Application as Wave Active Filter

ISRN Electronics ◽

10.1155/2013/968749 ◽

2013 ◽

Vol 2013 ◽

pp. 1-11 ◽

Cited By ~ 12

Author(s):

Neeta Pandey ◽

Praveen Kumar ◽

Jaya Choudhary

Keyword(s):

Signal Processing ◽

Cutoff Frequency ◽

Cmos Technology ◽

Bias Current ◽

Active Filter ◽

Current Conveyor ◽

Third Order ◽

Transconductance Amplifier ◽

Wave Filter ◽

Order Butterworth Filter

This paper proposes current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA), a new active building block for analog signal processing. The functionality of the proposed block is verified via SPICE simulations using 0.25 μm TSMC CMOS technology parameters. The usefulness of the proposed element is demonstrated through an application, namely, wave filter. The CCDDCCTA-based wave equivalents are developed which use grounded capacitors and do not employ any resistors. The flexibility of terminal characteristics is utilized to suggest an alternate wave equivalents realization scheme which results in compact realization of wave filter. The feasibility of CCDDCCTA-based wave active filter is confirmed through simulation of a third-order Butterworth filter. The filter cutoff frequency can be tuned electronically via bias current.

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