Analog circuits to implement a repetitive controller for harmonic compensation

Author(s):  
J. Leyva-Ramos ◽  
G. Escobar ◽  
R.R. Martinez ◽  
P. Mattavelli
2019 ◽  
Vol 55 (1) ◽  
pp. 680-688 ◽  
Author(s):  
Cristian Blanco ◽  
Francesco Tardelli ◽  
David Reigosa ◽  
Pericle Zanchetta ◽  
Fernando Briz

2017 ◽  
pp. 47-53
Author(s):  
Konstantin Sergeyevich GORSHKOV ◽  
◽  
Sergei Aleksandrovich KURGANOV ◽  
Vladimir Valentinovich FILARETOV ◽  
◽  
...  

Author(s):  
J. Fulna Kanaga ◽  
◽  
P. Subha Hency Jose ◽  

Author(s):  
B.J. Cain ◽  
G.L. Woods ◽  
A. Syed ◽  
R. Herlein ◽  
Toshihiro Nomura

Abstract Time-Resolved Emission (TRE) is a popular technique for non-invasive acquisition of time-domain waveforms from active nodes through the backside of an integrated circuit. [1] State-of-the art TRE systems offer high bandwidths (> 5 GHz), excellent spatial resolution (0.25um), and complete visibility of all nodes on the chip. TRE waveforms are typically used for detecting incorrect signal levels, race conditions, and/or timing faults with resolution of a few ps. However, extracting the exact voltage behavior from a TRE waveform is usually difficult because dynamic photon emission is a highly nonlinear process. This has limited the perceived utility of TRE in diagnosing analog circuits. In this paper, we demonstrate extraction of voltage waveforms in passing and failing conditions from a small-swing, differential logic circuit. The voltage waveforms obtained were crucial in corroborating a theory for some failures inside an 0.18um ASIC.


Author(s):  
Fubin Zhang ◽  
David Maxwell

Abstract Based on the understanding of laser based techniques’ physics theory and the topology/structure of analog circuit systems with feedback loops, the propagation of laser induced voltage/current alteration inside the analog IC is evaluated. A setup connection scheme is proposed to monitor this voltage/current alteration to achieve a better success rate in finding the fail site or defect. Finally, a case of successful isolation of a high resistance via on an analog device is presented.


Author(s):  
Ted Kolasa ◽  
Alfredo Mendoza

Abstract Comprehensive in situ (designed-in) diagnostic capabilities have been incorporated into digital microelectronic systems for years, yet similar capabilities are not commonly incorporated into the design of analog microelectronics. And as feature sizes shrink and back end interconnect metallization becomes more complex, the need for effective diagnostics for analog circuits becomes ever more critical. This paper presents concepts for incorporating in situ diagnostic capability into analog circuit designs. Aspects of analog diagnostic system architecture are discussed as well as nodal measurement scenarios for common signal types. As microelectronic feature sizes continue to shrink, diagnostic capabilities such as those presented here will become essential to the process of fault localization in analog circuits.


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