Many digital systems provide multiple but closely related functionalities, not all of them are required simultaneously. Dedicated hardware solution for each functionality will waste too much silicon area. This work presents automatic generation of a shared hardware solution for a set of functionalities which will execute only one functionality at a time. This shared hardware solution is termed as “Multi-Circuit”. A Multi-Circuit can be embedded as a configurable component in a System-on-Chip (SoC) design. Multi-Circuit is generated by initially mapping a given set of application functionalities on a common reconfigurable platform. Later on, all the unused logic and routing resources are efficiently removed from the reconfigurable hardware. Experiments reveal that Multi-Circuit is 18–42% smaller than the previously proposed technique named Application Specific Inflexible FPGA (ASIF). Multi-Circuit is 73–84% smaller than its corresponding FPGA design.
A HETEROGENEOUS MULTIPROCESSOR SYSTEM-ON-CHIP ARCHITECTURE INCORPORATING MEMORY ALLOCATION