Static analysis to mitigate soft errors in register files

2009 ◽  
Author(s):  
Jongeun Lee ◽  
A. Shrivastava
Keyword(s):  
Static Analysis ◽  
Soft Errors ◽  
Register Files

A compiler optimization to reduce soft errors in register files

2009 ◽  
Vol 44 (7) ◽  
pp. 41-49 ◽  
Author(s):  
Jongeun Lee ◽  
Aviral Shrivastava
Keyword(s):  
Compiler Optimization ◽  
Soft Errors ◽  
Register Files

Effects of openings on the seismic behavior and performance level of concrete shear walls

2019 ◽  
Author(s):  
Hossein Alimohammadi ◽  
Mostafa Dalvi Esfahani ◽  
Mohammadali Lotfollahi Yaghin
Keyword(s):  
Static Analysis ◽  
Cross Section ◽  
Seismic Behavior ◽  
Shear Walls ◽  
Shear Wall ◽  
Constant Cross Section ◽  
Added Resistance ◽  
Different Shapes ◽  
And Performance ◽  
Abaqus Software

In this study, the seismic behavior of the concrete shear wall considering the opening with different shapes and constant cross-section has been studied, and for this purpose, several shear walls are placed under the increasingly non-linear static analysis (Pushover). These case studies modeled in 3D Abaqus Software, and the results of the ductility coefficient, hardness, energy absorption, added resistance, the final shape, and the final resistance are compared to shear walls without opening.

Analysis of Induced End-of-Life Failures in SRAM Through Nanoprobing

2018 ◽  
Author(s):  
Oberon Dixon-Luinenburg ◽  
Jordan Fine
Keyword(s):  
End Of Life ◽  
Soft Errors ◽  
Cause Analysis ◽  
New Approach ◽  
Performance Loss ◽  
Root Cause ◽  
Long Period ◽  
Atomic Force ◽  
Stress Resultant ◽  
Voltage Stress

Abstract In this paper, we demonstrate a novel nanoprobing approach to establish cause-and-effect relationships between voltage stress and end-of-life performance loss and failure in SRAM cells. A Hyperion II Atomic Force nanoProber was used to examine degradation for five 6T cells on an Intel 14 nm processor. Ten minutes of asymmetrically applied stress at VDD=2 V was used to simulate a ‘0’ bit state held for a long period, subjecting each pullup and pulldown to either VDS or VGS stress. Resultant degradation caused read and hold margins to be reduced by 20% and 5% respectively for the ‘1’ state and 5% and 2% respectively for the ‘0’ state. ION was also reduced, for pulldown and pullup respectively, by 4.5% and 5.4% following VGS stress and 2.6% and 33.8% following VDS stress. Negative read margin failures, soft errors, and read time failures all become more prevalent with these aging symptoms whereas write stability is improved. This new approach enables highly specific root cause analysis and failure prediction for end-of-life in functional on-product SRAM.

Static Analysis Based Correctness Verification for Mandatory Access Control Framework

2009 ◽  
Vol 32 (4) ◽  
pp. 730-739 ◽  
Author(s):  
Xin-Song WU ◽  
Zhou-Yi ZHOU ◽  
Ye-Ping HE ◽  
Hong-Liang LIANG ◽  
Chun-Yang YUAN
Keyword(s):  
Access Control ◽  
Static Analysis ◽  
Mandatory Access Control ◽  
Control Framework
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