Proposed Process Flow for Potential Well Based FDSOI MOSFET at 20 nm Gate Length

Author(s):  
Chandan K. Jaiswal ◽  
Nishant ◽  
Shruti Mehrotra ◽  
S. Qureshi
Author(s):  
Angada B. Sachid ◽  
Roswald Francis ◽  
Maryam Shojaei Baghini ◽  
Dinesh K. Sharma ◽  
Karl-Heinz Bach ◽  
...  
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Author(s):  
Than Phyo Kyaw

The influence of the GaN buffer layer doped with carbon on the avalanche breakdown effect of normally open HEMT AlGaN / AlN / GaN transistors was studied. The avalanche breakdown was simulated in a structure where the gate length is LG = 0.3 mkm, the distance between the source and gate is LSG = 1.5 mkm, and the distance between the gate and drain is LGD = 2.2 mkm. For modeling, consider a layer doped with carbon, the thickness of which is 0.3 mkm, and the layer is located at a distance of 20 nm from the channel. The Simulation showed that with an increase in the concentration of carbon doping of the buffer, the breakdown voltage increases in the range UB = 225 – 360 (V). When the layer thickness changes to 0.4 mkm, the breakdown voltage increases in the range UB = 230 – 446 (V). For a structure where the gate length is LG = 0.8 mkm, the distance between the source and the gate is LSG = 1.0 mkm, the distance between the gate and drain is LGD = 3.0 mkm, the breakdown voltage increases in the range UB = 300 – 622 (V).


2012 ◽  
Vol 11 (4) ◽  
pp. 808-817 ◽  
Author(s):  
Brahim Benbakhti ◽  
Antonio Martinez ◽  
Karol Kalna ◽  
Geert Hellings ◽  
Geert Eneman ◽  
...  

2021 ◽  
Author(s):  
Peng Cui ◽  
Yuping Zeng

Abstract Due to the low cost and the scaling capability of Si substrate, InAlN/GaN high-electron-mobility transistors (HEMTs) on silicon substrate have attracted more and more attentions. In this paper, a high-performance 50-nm-gate-length InAlN/GaN HEMT on Si with a high on/off current (Ion/Ioff) ratio of 7.28 × 106, an average subthreshold swing (SS) of 72 mV/dec, a low drain-induced barrier lowing (DIBL) of 88 mV, an off-state three-terminal breakdown voltage (BVds) of 36 V, a current/power gain cutoff frequency (fT/fmax) of 140/215 GHz, and a Johnson’s figure-of-merit (JFOM) of 5.04 THz∙V is simultaneously demonstrated. The device extrinsic and intrinsic parameters are extracted using equivalent circuit model, which is verified by the good agreement between simulated and measured S-parameter values. Then the scaling behavior of InAlN/GaN HEMTs on Si is predicted using the extracted extrinsic and intrinsic parameters of devices with different gate lengths (Lg). It presents that a fT/fmax of 230/327 GHz can be achieved when Lg­ scales down to 20 nm with the technology developed in the study, and an improved fT/fmax of 320/535 GHz can be achieved on a 20-nm-gate-length InAlN/GaN HEMT with regrown ohmic contact technology and 30% decreased parasitic capacitance. This study confirms the feasibility of further improvement of InAlN/GaN HEMTs on Si for RF applications.


2018 ◽  
Vol 24 (8) ◽  
pp. 5695-5699
Author(s):  
Jackuline Moni ◽  
T. Jaspar Vinitha Sundari

Using standardized simulations, we report a meticulous learning of the Junctionless nanowire with tunneling mechanism and the dependence of Subthreshold slope on operational parameters by varying the channel diameter, Gate length and doping concentration using Synopsys Sentaurus TCAD simulations. For the first time, Junctionless Nanowire in the company of tunneling architecture is proposed and explored. Our simulation study shows that a decrease in channel diameter and doping concentration results in higher band to band generation and steeper slope. Junctionless tunneling nanowire of diameter 10 nm, gate length of 20 nm, and uniform doping concentration of 1e19 cm−3 obtains steepest Subthreshold swing of about 8 mV/dec (point) and 52 mV/dec (average), an on/off current ratio of 1010, on current of 10−5 A/um.


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