Accelerated reliability evaluation for high density packaging integrated circuits

Author(s):  
Bin Yao ◽  
Ping Lai
1982 ◽  
Vol 10 (1) ◽  
pp. 23-29
Author(s):  
M. Monnier ◽  
M. Monneraye

This paper intends to illustrate, through a practical application, the possibilities of LEP foil flexible circuitry for mounting and interconnecting integrated circuits. This technique results in a high density packaging which is used here for the integration of two components, a microprocessor and a memory, in an electronic payment card.


IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 813-826
Author(s):  
Farid Uddin Ahmed ◽  
Zarin Tasnim Sandhie ◽  
Liaquat Ali ◽  
Masud H. Chowdhury

2005 ◽  
Vol 297-300 ◽  
pp. 837-843
Author(s):  
Takashi Hasegawa ◽  
Masumi Saka

Solder is the most frequently used alloy, which serves as the bonding metal for electronics components. Recently, the interconnected bump is distinctly downsizing its bulk along with the integration of high-density packaging. The evaluation of electromigration damage for solder bumps is indispensable. Hence, it is fairly urgent to understand the mechanism of the electromigration damage to be capable of securing reliability of the solder bump and ultimately predicting its failure lifetime. Electromigration pattern in multi-phase material is determined by the combination of current density, temperature and current-applying time. In this paper, diagram of electromigration pattern (DEP) in solders is presented, where both of eutectic Pb-Sn and Pb-free solders are treated. DEP gives the basis for discussing and predicting the electromigration damage in solders.


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