A 250 mV 7.5 μW 61 dB SNDR SC ΔΣ Modulator Using Near-Threshold-Voltage-Biased Inverter Amplifiers in 130 nm CMOS

2012 ◽  
Vol 47 (3) ◽  
pp. 709-721 ◽  
Author(s):  
Fridolin Michel ◽  
Michiel S. J. Steyaert
Keyword(s):  
Threshold Voltage ◽  
Near Threshold

Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology

2015 ◽  
Vol 23 (11) ◽  
pp. 2748-2752 ◽  
Author(s):  
Younghwi Yang ◽  
Juhyun Park ◽  
Seung Chul Song ◽  
Joseph Wang ◽  
Geoffrey Yeap ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Sram Cell ◽  
Near Threshold

scholarly journals Channel Length Biasing for Improving Read Margin of the 8T SRAM at Near Threshold Operation

Electronics ◽  
2019 ◽  
Vol 8 (6) ◽  
pp. 611 ◽  
Author(s):  
Ik Joon Chang ◽  
Yesung Kang ◽  
Youngmin Kim
Keyword(s):  
Threshold Voltage ◽  
Supply Voltage ◽  
Random Access ◽  
Channel Length ◽  
Voltage Level ◽  
Exact Data ◽  
Optimum Energy ◽  
The Stability ◽  
20 Nm ◽  
Near Threshold

Reducing a supply voltage in order to minimize power consumption in memory is a major design consideration in this field of study. In static random access memory (SRAM), optimum energy can be achieved by reducing the voltage near the threshold voltage level for near threshold voltage computing (NTC). However, lowering the operational voltage drastically degrades the stability of SRAM. Thus, in conventional 6T SRAM, it is almost impossible to read exact data, even when a small process variation occurs. To address this problem, an 8T SRAM structure is proposed which can be widely used for improving the read stability at lower voltage operation. In this paper, we investigate the channel length biasing effect on the read access transistor of the 8T SRAM in NTC and compare this with 6T SRAM. Read stability can be improved by suppressing the leakage current due to the longer channel length. Simulation results show that, in NTC, up to a 12× read-error reduction can be achieved by the 20 nm channel length biasing in the 8T SRAM compared to 6T SRAM.

A 32nm 8.3GHz 64-entry × 32b variation tolerant near-threshold voltage register file

2010 ◽  
Author(s):  
Amit Agarwal ◽  
Steven Hsu ◽  
Sanu Mathew ◽  
Mark Anders ◽  
Himanshu Kaul ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Register File ◽  
Near Threshold

scholarly journals Dynamic-static hybrid near-threshold-voltage adder design for ultra-low power applications

2015 ◽  
Vol 12 (3) ◽  
pp. 20141122-20141122 ◽  
Author(s):  
Xin-Xiang Lian ◽  
I-Chyn Wey ◽  
Chien-Chang Peng ◽  
Zhi-Qun Cheng
Keyword(s):  
Low Power ◽  
Threshold Voltage ◽  
Ultra Low Power ◽  
Near Threshold

Ultra low overhead error mask flip‐flop in near threshold voltage processor design

2016 ◽  
Vol 52 (21) ◽  
pp. 1799-1801 ◽  
Author(s):  
Ziyi Hao ◽  
Xiaoyan Xiang ◽  
Chen Chen ◽  
Jianyi Meng ◽  
Xiaolang Yan
Keyword(s):  
Threshold Voltage ◽  
Processor Design ◽  
Flip Flop ◽  
Near Threshold
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