Embedded real time digital signal processing unit for a 64-channel PET detector module

Author(s):  
Louis Arpin ◽  
Konin Koua ◽  
Sylvain Panier ◽  
Haithem Bouziri ◽  
Mouadh Abidi ◽  
...  
2014 ◽  
Vol 9 (3) ◽  
pp. 11-19
Author(s):  
Petr Zubarev ◽  
Svetlana Ivanenko ◽  
Alina Ivanova ◽  
Andrey Kvashnin ◽  
Aleksandr Kotelnikov ◽  
...  

In this paper, digital analyzer of diamond detector signals of ITER Vertical Neutron Camera (ITER VNC) are described, which uses digital signal processing. Digital analyzer of pulse signals is based on ADC12500PXIe (two channels, 12 bit, 500 MHz, PXI Express), which satisfies the ITER VNC requirements. In this paper, the architecture of digital signal processing unit is given. Trapezoidal digital shaper for pile-up separation and energy spectrum unit are described. In addition, structure of digital analyzer software levels are considered


1989 ◽  
Vol 27 (1-5) ◽  
pp. 143-146 ◽  
Author(s):  
P. Jokitalo ◽  
E. Honkanen ◽  
I. Moring ◽  
H. Palo ◽  
K. Rautiola

2021 ◽  
Vol 253 ◽  
pp. 03002
Author(s):  
Michael Zhuravlev ◽  
Grigorii Nemtcev ◽  
Nikita Nagornyi ◽  
Sergey Meshchaninov ◽  
Roman Rodionov ◽  
...  

CVD Diamond Detectors are going to be used in a number of neutron diagnostics of the International Thermonuclear Experimental Reactor (ITER) during its power operation phase [1]. One of such diagnostics is the Vertical Neutron Camera (VNC), which is being developed by the ITER Russian Domestic Agency (Institution “Project Center ITER”). In VNC Diamond detectors are used for real-time neutron flux and neutron spectrum measurements. In this paper we present current advancements in the development of a digital signal processing unit for the VNC diamond detector measurement channel. We give an overview of the signal properties, hardware requirements and firmware/software solutions used in the current version of the signal processing unit. We also present preliminary test results for this measurement system and explain the discovered problems and possible solutions.


1987 ◽  
Vol 24 (1) ◽  
pp. 65-72
Author(s):  
C. Ward

An accelerator consisting of a fast digital multiplier and A/D and D/A converters is designed for the BBC microcomputer. The circuit enables ‘hands-on’ experience of digital signal processing to be provided at minimal cost. Examples of implementations of FIR filters and an autocorrelation algorithm are provided.


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