A variable-latency, ultra-low-voltage RISC processor with a new in-situ error detection and correction technique

Author(s):  
Chi-Chun Lin ◽  
Kuo-Chiang Chang ◽  
Chih-Wei Liu
2019 ◽  
Vol 16 (11) ◽  
pp. 20190180-20190180
Author(s):  
Jongeun Koo ◽  
Eunhyeok Park ◽  
Dongyoung Kim ◽  
Junki Park ◽  
Sungju Ryu ◽  
...  

2011 ◽  
Vol 60 (10) ◽  
pp. 1511-1516 ◽  
Author(s):  
Pedro Reviriego ◽  
Chris Bleakley ◽  
Juan Antonio Maestro ◽  
Anne O'Donnell

Sign in / Sign up

Export Citation Format

Share Document