Battery-Free Game Boy

2021 ◽  
Vol 25 (2) ◽  
pp. 22-26
Author(s):  
Jasper de Winkel ◽  
Vito Kortbeek ◽  
Josiah Hester ◽  
Przemysław Pawełczak
Keyword(s):  
Energy Harvesting ◽  
Electronic Device ◽  
Free System ◽  
Mobile Gaming ◽  
Power Failure ◽  
Run Off ◽  
Continuous User ◽  
Game Console ◽  
User Attention ◽  
Mobile Electronic Device

Any future mobile electronic device with which a user interacts (smartphone, hand-held game console) should not pollute our planet. Consequently, designers need to rethink how to build mobile devices with fewer components that negatively impact the environment (by replacing batteries with energy harvesting sources) while not compromising the user experience quality. This article addresses the challenges of battery-free mobile interaction and presents the first battery-free, personal mobile gaming device powered by energy harvested from gamer actions and sunlight. Our design implements a power failure resilient Nintendo Game Boy emulator that can run off-the-shelf classic Game Boy games like Tetris or Super Mario Land. Beyond a fun toy, our design represents the first battery-free system design for continuous user attention despite frequent power failures caused by intermittent energy harvesting.

scholarly journals Design, Implementation and Power Analysis of Low Voltage Heterojunction Tunnel Field Effect Transistor based Basic 6T SRAM Cell

2019 ◽  
Vol 8 (11) ◽  
pp. 2898-2903 ◽  
Keyword(s):  
Low Voltage ◽  
Electronic Device ◽  
Average Power ◽  
Cmos Technology ◽  
Subthreshold Swing ◽  
Semiconductor Memory ◽  
Energy Applications ◽  
Sram Cell ◽  
Memory Applications ◽  
Mobile Electronic Device

The battery-powered mobile devices limited energy process by MOSFET's due to subthreshold swing and underneath 60mV/dec for ultra fewer energy applications. This research introduces the layout and execution of a mobile electronic device full-on-presence, extended Miller potential, and reduced HETT subthreshold swing effectiveness has been compared with MOSFET's Gate oxide blending on source can increase channel tunneling in this work. To enhance transistor line, Miller capacitance impact can be decreased by using low band offset equipment and small power product of metals such as Ge or SiGe. This, in turn, leads to stronger transistor efficiency features. The proposed layout and execution of HETT includes manufacturing of mutually NHETT and PHETT and efficiency analyzes of both NHETT and PHETT. Concerning the fundamental and skeletal distinctions among MOSFET and HETT to promote the utilization of MOSFET instead of HETT, the benefits and constraints of both NHETT and PHETT have been detailed. HETT's construction process is by no means entirely different, suitable for the scheme of MOS method and suitable for transportable motorized applications. HETT provides the 6T SRAM cell electricity evaluation and the output was reviewed using standard SRAM cell. The average power, maximum power and minimum power of SRAM by using both MOSFET and HETT are obtained and compared. The mask layers of HETT fabrication is not that much difference than MOSFET and hence CMOS MOSFET fabrication is friendly to HETT fabrication. In future, the combination of both CMOS MOSFET and HETT are used, CMOS technology for digital logic and HETT for semiconductor memory applications.

Applications of Vibration-Based Energy Harvesting (VEH) Devices

2021 ◽  
pp. 81-116
Author(s):  
Muhammad Faruq Foong ◽  
Chung Ket Thein ◽  
Beng Lee Ooi
Keyword(s):  
Energy Harvesting ◽  
Electronic Device ◽  
Modern Society ◽  
Vibration Energy ◽  
Vibration Energy Harvester ◽  
Portable Electronic Device ◽  
Mechanical Transducer ◽  
Alternative Power ◽  
Electronic Technologies ◽  
Electronic Sensors

This chapter reviews present usage of vibration-based energy harvesting (VEH) devices and their applications. The evolution of energy resources and advancement in electronic technologies has resulted in the need for a self-sustainable wireless/portable electronic device in current modern society. Batteries are non-beneficial in the miniaturization process of electronic designing, and alternative power supplies are desperately needed to drive the advance of the wireless/portable development further. VEH has emerged as one of the most promising alternatives to replace conventional batteries and as the solution for the bottleneck. Consideration of creating an optimal vibration energy harvester is suggested through an analytical model of a mechanical transducer, including a relatively new method defined as triboelectricity. Useful applications and usages of VEH are presented, and some suggestions for improvement are also given. Lastly, the trend of energy harvesting is annotated and commented in-line with the demand of electronic sensors market.

MaxTracker: Continuously Tracking the Maximum Computation Progress for Energy Harvesting ReRAM-based CNN Accelerators

2021 ◽  
Vol 20 (5s) ◽  
pp. 1-23
Author(s):  
Keni Qiu ◽  
Nicholas Jao ◽  
Kunyu Zhou ◽  
Yongpan Liu ◽  
Jack Sampson ◽  
...  
Keyword(s):  
Energy Storage ◽  
Energy Harvesting ◽  
Intermediate Energy ◽  
Input Power ◽  
Optimization Techniques ◽  
Just In Time ◽  
Power Failure ◽  
Load Power ◽  
Order Of Magnitude ◽  
Full Activation

There is an ongoing trend to increasingly offload inference tasks, such as CNNs, to edge devices in many IoT scenarios. As energy harvesting is an attractive IoT power source, recent ReRAM-based CNN accelerators have been designed for operation on harvested energy. When addressing the instability problems of harvested energy, prior optimization techniques often assume that the load is fixed, overlooking the close interactions among input power, computational load, and circuit efficiency, or adapt the dynamic load to match the just-in-time incoming power under a simple harvesting architecture with no intermediate energy storage. Targeting a more efficient harvesting architecture equipped with both energy storage and energy delivery modules, this paper is the first effort to target whole system, end-to-end efficiency for an energy harvesting ReRAM-based accelerator. First, we model the relationships among ReRAM load power, DC-DC converter efficiency, and power failure overhead. Then, a maximum computation progress tracking scheme ( MaxTracker ) is proposed to achieve a joint optimization of the whole system by tuning the load power of the ReRAM-based accelerator. Specifically, MaxTracker accommodates both continuous and intermittent computing schemes and provides dynamic ReRAM load according to harvesting scenarios. We evaluate MaxTracker over four input power scenarios, and the experimental results show average speedups of 38.4%/40.3% (up to 51.3%/84.4%), over a full activation scheme (with energy storage) and order-of-magnitude speedups over the recently proposed (energy storage-less) ResiRCA technique. Furthermore, we also explore MaxTracker in combination with the Capybara reconfigurable capacitor approach to offer more flexible tuners and thus further boost the system performance.

Electronic Cone Illumination with the Conventional Transmission Electron Microscope

1977 ◽  
Vol 35 ◽  
pp. 72-73
Author(s):  
William Krakow
Keyword(s):  
Electronic Device ◽  
Chromatic Aberration ◽  
Objective Lens ◽  
Hollow Cone ◽  
Transmission Electron ◽  
Lissajous Figures ◽  
High Resolution Images ◽  
Imaging Mode ◽  
Diffraction Patterns ◽  
Transmission Microscope

An electronic device has been constructed which manipulates the primary beam in the conventional transmission microscope to illuminate a specimen under a variety of virtual condenser aperture conditions. The device uses the existing tilt coils of the microscope, and modulates the D.C. signals to both x and y tilt directions simultaneously with various waveforms to produce Lissajous figures in the back-focal plane of the objective lens. Electron diffraction patterns can be recorded which reflect the manner in which the direct beam is tilted during exposure of a micrograph. The device has been utilized mainly for the hollow cone imaging mode where the device provides a microscope transfer function without zeros in all spatial directions and has produced high resolution images which are also free from the effect of chromatic aberration. A standard second condenser aperture is employed and the width of the cone annulus is readily controlled by defocusing the second condenser lens.

Resistance Monitor and Control for Vacuum Evaporation of Metals and Carbon

1976 ◽  
Vol 34 ◽  
pp. 572-573
Author(s):  
Russell L. Steere ◽  
Eric F. Erbe ◽  
J. Michael Moseley
Keyword(s):  
Electronic Device ◽  
Point Sources ◽  
High Contrast ◽  
Variable Resistor ◽  
Quality Of Results ◽  
Low Contrast ◽  
Evaporation Source ◽  
And Control ◽  
At Will

We have designed and built an electronic device which compares the resistance of a defined area of vacuum evaporated material with a variable resistor. When the two resistances are matched, the device automatically disconnects the primary side of the substrate transformer and stops further evaporation.This approach to controlled evaporation in conjunction with the modified guns and evaporation source permits reliably reproducible multiple Pt shadow films from a single Pt wrapped carbon point source. The reproducibility from consecutive C point sources is also reliable. Furthermore, the device we have developed permits us to select a predetermined resistance so that low contrast high-resolution shadows, heavy high contrast shadows, or any grade in between can be selected at will. The reproducibility and quality of results are demonstrated in Figures 1-4 which represent evaporations at various settings of the variable resistor.

Digital image processing methods applied to the study of annealing time on semiconductor-metal eutectic composites

1988 ◽  
Vol 46 ◽  
pp. 848-849
Author(s):  
J. Hefter
Keyword(s):  
Image Processing ◽  
Digital Image Processing ◽  
Digital Image ◽  
Electronic Device ◽  
Processing System ◽  
Average Diameter ◽  
Eutectic Solidification ◽  
Metal Silicide ◽  
The Matrix ◽  
Microscopic Studies

Semiconductor-metal composites, formed by the eutectic solidification of silicon and a metal silicide have been under investigation for some time for a number of electronic device applications. This composite system is comprised of a silicon matrix containing extended metal-silicide rod-shaped structures aligned in parallel throughout the material. The average diameter of such a rod in a typical system is about 1 μm. Thus, characterization of the rod morphology by electron microscope methods is necessitated.The types of morphometric information that may be obtained from such microscopic studies coupled with image processing are (i) the area fraction of rods in the matrix, (ii) the average rod diameter, (iii) an average circularity (roundness), and (iv) the number density (Nd;rods/cm2). To acquire electron images of these materials, a digital image processing system (Tracor Northern 5500/5600) attached to a JEOL JXA-840 analytical SEM has been used.

In situ TEM measurements of the electrical properties of interface dislocations

1992 ◽  
Vol 50 (2) ◽  
pp. 1338-1339
Author(s):  
F. M. Ross ◽  
R. Hull ◽  
D. Bahnck ◽  
J. C. Bean ◽  
L. J. Peticolas ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electronic Device ◽  
In Situ Tem ◽  
Device Performance ◽  
Misfit Dislocations ◽  
Electrical Characteristics ◽  
Strained Layer ◽  
Transmission Electron ◽  
Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

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