scholarly journals A PV FED Three Phase Switched Z-source Multi Level Inverter for Induction Motor Drives

Author(s):  
Sinu KJ ◽  
G. Ranganathan

<p>Generally induction motor drives posses higher harmonic contents in line voltage and current due to high switching frequency used in inverters. Conventional induction motor drives employ two level voltage source inverters which has THD in level of 50%. This paper presents a switched z-source multilevel inverter which has voltage boosting capability and has lesser THD level in comparison with conventional two level voltage source inverters. This drive is fed from a photo voltaic source because of its voltage boosting capability. A single phase five level switched z-source inverter is initially designed and considered as single cell and three such cells are created for powering three phase induction motor. The proposed three cell PV source switched z-source multilevel inverter for three phase induction motor is simulated in MATLAB/Simulink software to verify merits of proposed IM drive</p>

2011 ◽  
Vol 26 (1) ◽  
pp. 64-72 ◽  
Author(s):  
F Khoucha ◽  
M S Lagoun ◽  
A Kheloui ◽  
Mohamed El Hachemi Benbouzid

2011 ◽  
Vol 3 (6) ◽  
pp. 561
Author(s):  
Chris S. Edrington ◽  
Oleg Vodyakho ◽  
Fletcher Fleming ◽  
Sardis Azongha ◽  
Mahesh Krishnamurthy

Energies ◽  
2020 ◽  
Vol 13 (5) ◽  
pp. 1074 ◽  
Author(s):  
Eduardo Zafra ◽  
Sergio Vazquez ◽  
Hipolito Guzman Miranda ◽  
Juan A. Sanchez ◽  
Abraham Marquez ◽  
...  

This work describes an efficient implementation in terms of computation time and resource usage in a Field-Programmable System-On-Chip (FPSoC) of a Finite Control Set Model Predictive Control (FCS-MPC) algorithm. As an example, the FCS-MPC implementation is used for the current reference tracking of a two-level three-phase power converter. The proposed solution is an enabler for using both complex control algorithms and digital controllers for high switching frequency semiconductor technologies. An original HW/SW (hardware and software) system architecture for an FPSoC is designed to take advantage of a modern operating system, while removing time uncertainty in real-time software tasks, and exploiting dedicated FPGA fabric for the most complex computations. In addition, two different architectures for the FPGA-implemented functionality are proposed and compared in order to study the area-speed trade-off. Experimental results show the feasibility of the proposed implementation, which achieves a speed hundreds of times faster than the conventional Digital Signal Processor (DSP)-based control platform.


Author(s):  
V. Mohan ◽  
N. Stalin ◽  
S. Jeevananthan

The pulse width modulated voltage source inverters (PWM-VSI) dominate in the modern industrial environment. The conventional PWM methods are designed to have higher fundamental voltage, easy filtering and reduced total harmonic distortion (THD). There are number of clustered harmonics around the multiples of switching frequency in the output of conventional sinusoidal pulse width modulation (SPWM) and space vector pulse width modulation (SVPWM) inverters. This is due to their fixed switching frequency while the variable switching frequency makes the filtering very complex. Random carrier PWM (RCPWM) methods are the host of PWM methods, which use randomized carrier frequency and result in a harmonic profile with well distributed harmonic power (no harmonic possesses significant magnitude and hence no filtering is required). This paper proposes a chaos-based PWM (CPWM) strategy, which utilizes a chaotically changing switching frequency to spread the harmonics continuously to a wideband and to reduce the peak harmonics to a great extent. This can be an effective way to suppress the current harmonics and torque ripple in induction motor drives. The proposed CPWM scheme is simulated using MATLAB / SIMULINK software and implemented in three phase voltage source inverter (VSI) using field programmable gate array (FPGA).


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