phase change memory
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2022 ◽  
Vol 138 ◽  
pp. 106273
Author(s):  
Zi-Jing Cui ◽  
Dao-Lin Cai ◽  
Yang Li ◽  
Cheng-Xing Li ◽  
Zhi-Tang Song

2022 ◽  
pp. 2103478
Author(s):  
Zhe Yang ◽  
Bowen Li ◽  
Jiang‐Jing Wang ◽  
Xu‐Dong Wang ◽  
Meng Xu ◽  
...  

Author(s):  
Wencheng Fang ◽  
Sannian Song ◽  
Jin Zhao ◽  
Chengxing Li ◽  
Daolin Cai ◽  
...  

Author(s):  
Ruobing Wang ◽  
Tianqi Guo ◽  
Dongning Yao ◽  
Sannian Song ◽  
Zhitang Song

Author(s):  
Lei Sun ◽  
Yimin Chen ◽  
Yuanen Mao ◽  
Yingjie Meng ◽  
Chenjie Gu ◽  
...  

2021 ◽  
Author(s):  
Barak Hoffer ◽  
Nicolás Wainstein ◽  
Christopher M. Neumann ◽  
Eric Pop ◽  
Eilam Yalon ◽  
...  

Abstract Stateful logic is a digital processing-in-memory technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with von Neumann architectures. In stateful logic, memory cells are used to perform the logic operations without reading or moving any data outside the memory array. This has been previously demonstrated using several resistive memory types, but not with commercially available phase-change memory (PCM). Here we present the first implementation of stateful logic using PCM. We experimentally demonstrate four logic gate types (NOR, IMPLY, OR, NIMP) using commonly used PCM materials and crossbar-compatible structures. Our stateful logic gates form a functionally complete set, which enables sequential execution of any logic function within the memory and paves the way to PCM-based digital processing-in-memory systems.


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