Ohmic and Rectifying Contacts on High Resistivity P-Type Cadmium Telluride

1982 ◽  
Vol 16 ◽  
Author(s):  
A. Musa ◽  
J.P. Ponpon ◽  
M. Hage-Ali

ABSTRACTOhmic and rectifying contacts on high resistivity etched P-type cadmium telluride have been studied in order to produce diode structures.For this,we have first investigated the properties of gold contacts obtained by chemical reactions of CdTe dippedin gold chloride.Both electrical characterization and structure have been analyzed as a function of the experimental conditions of the contact deposition.The results can be interpreted in terms of a current flow enhanced by tunnelling through the Au-CdTe junction and related to the structure of the interface a few tens of nanometer below the gold contact. In addition,several rectifying contacts have been investigated , in order to achieve a structure having low leakage current.

2017 ◽  
Vol 897 ◽  
pp. 63-66
Author(s):  
Selsabil Sejil ◽  
Loic Lalouat ◽  
Mihai Lazar ◽  
Davy Carole ◽  
Christian Brylinski ◽  
...  

This study deals with the electrical characterization of PiN diodes fabricated on a 4°off-axis 4H-SiC n+ substrate with a n- epilayer (1×1016 cm-3 / 10 µm). Optimized p++ epitaxial areas were grown by Vapour-Liquid-Solid (VLS) transport to form p+ emitters localized in etched wells with 1 µm depth. Incorporated Al level in the VLS p++ zones was checked by SIMS (Secondary Ion Mass Spectroscopy), and the doping level was found in the range of 1-3×1020 at.cm-3. Electrical characterizations were performed on these PiN diodes, with 800 nm deposit of aluminium as ohmic contact on p-type SiC. Electrical measurements show a bipolar behaviour, and very high sustainable forward current densities ≥ 3 kA.cm-2, preserving a low leakage current density in reverse bias. These measurements were obtained on structures without any passivation and no edge termination.


2007 ◽  
Vol 556-557 ◽  
pp. 101-104
Author(s):  
Jie Zhang ◽  
Esteban Romano ◽  
Janice Mazzola ◽  
Swapna G. Sunkari ◽  
Carl Hoff ◽  
...  

In this paper we present highly uniform SiC epitaxy in a horizontal hot-wall CVD reactor with wafer rotation. Epilayers with excellent thickness uniformity of better than 1% and doping uniformity better than 5% are obtained on 3-in, 4° off-axis substrates. The same growth conditions for uniform epitaxy also generate smooth surface morphology for the 4° epiwafers. Well controlled doping for both n- and p-type epilayers is obtained. Abrupt interface transition between n- and pdoped layers in a wide doping range is demonstrated. Tight process control for both thickness and doping is evidenced by the data collected from the epi operations. The average deviation from target is 2.5% for thickness and 6% for doping. PiN diodes fabricated on a standard 3-in, 4° epiwafer have shown impressive performance. More than half of the 1 mm2 devices block 1 kV (2.3 MV/cm) with a low leakage current of 1 μA.


1987 ◽  
Vol 2 (3) ◽  
pp. 322-328 ◽  
Author(s):  
J. K. Cochran ◽  
A. T. Chapman ◽  
D. N. Hill ◽  
K. J. Lee

Field emitter array cathodes were fabricated from unidirectionally solidified composites of tungsten fibers in an insulating yttria-stabilized-zirconia (YSZ) matrix. A close-spaced molybdenum gate film (extractor) was formed utilizing c-beam evaporation of alumina as an insulator, which was overlayed by the molybdenum extractor. The high resistivity of the composite matrix coupled with the alumina insulator resulted in low leakage current and permitted dc operation of the device. Emission testing demonstrated current densities of 1–5 A/cm2 with leakage in the μA range for applied potentials of 125–200 V. Variation of emitter tip geometries from hemispheres to right circular cylinders to pointed cones produced increases in emission consistent with reduced tip radii.


2021 ◽  
Author(s):  
Mikhail Basov

The small silicon chip of Schottky diode (0.8x0.8x0.4 mm<sup>3</sup>) with planar arrangement of electrodes (chip PSD) as temperature sensor, which functions under the operating conditions of pressure sensor, was developed. The forward I-V characteristic of chip PSD is determined by potential barrier between Mo and n-Si (N<sub>D</sub> = 3 × 10<sup>15</sup> cm<sup>-3</sup>). Forward voltage U<sub>F</sub> = 208 ± 6 mV and temperature coefficient TC = -1.635 ± 0.015 mV/⁰C (with linearity k<sub>T</sub> <0.4% for temperature range of -65 to +85 ⁰C) at supply current I<sub>F</sub> = 1 mA is achieved. The reverse I-V characteristic has high breakdown voltage U<sub>BR</sub> > 85 V and low leakage current I<sub>L</sub> < 5 μA at 25 ⁰C and I<sub>L</sub> < 130 μA at 85 ⁰C (U<sub>R</sub> = 20 V) because chip PSD contains the structure of two p-type guard rings along the anode perimeter. The application of PSD chip for wider temperature range from -65 to +115 ⁰C is proved. The separate chip PSD of temperature sensor located at a distance of less than 1.5 mm from the pressure sensor chip. The PSD chip transmits input data for temperature compensation of pressure sensor errors by ASIC and for direct temperature measurement.


2000 ◽  
Vol 657 ◽  
Author(s):  
Eivind Lund ◽  
Terje G. Finstad

ABSTRACTWe have performed new measurements of the temperature and doping dependency of the piezoresistive effect in p-type silicon. Piezoresistivity is one of the most common sensing principles of micro-electro-mechanical-systems (MEMS). Our measurements are performed in a specially designed setup based on the well-known 4 point bending technique. The samples are beams of full wafer thickness. To minimize leakage currents and to obtain uniform doping profiles, we have used SIMOX (Separation by IMplantation of OXygen) substrates with resistors defined in an epitaxial layer. Spreading resistance measurements show that the doping profiles are uniform with depth, while measurements of leakage current versus temperature indicate low leakage current. In this paper we present results for the doping concentration range from 1×1017 – 1×1020 cm−3 and the temperature range from –30 to 150 degrees Celsius. The results show a doping dependency of piezoresistivity well described by the current models. The measurements of the temperature dependency of the coefficients of piezoresistivity are compared to a linear model with a negative temperature coefficient whose absolute value decreases with increasing doping.


2006 ◽  
Vol 45 (No. 11) ◽  
pp. L319-L321 ◽  
Author(s):  
Norio Tsuyukuchi ◽  
Kentaro Nagamatsu ◽  
Yoshikazu Hirose ◽  
Motoaki Iwaya ◽  
Satoshi Kamiyama ◽  
...  

This paper presents the study on aluminium-doped zinc oxide (AZO) films prepared by atmospheric atomic layer deposition (AALD) using Diethylzinc (DEZ), Zn(C2H5)2, and Trimethylaluminum (TMA), Al(CH3)3 as precursors. The optimal condition for doping was investigated by changing in DEZ/TMA ratio. The crystal structure of fabricated thin films shows the hexagonal wurtzite structure with the orientation along the c-axis. The influence of heat treatment on the grain size, carrier type and concentration of post-fabricated films deposited on the different substrates which are borosilicate glass and sapphire was also analysed. The Hall measurement to determine the carrier type and resistivity at room temperature to 400oC was performed. The measurement results show that as-deposited samples behave as alloy-like property with p-type carriers and high resistivity. However, they turned into n-type nature as expected with the increase in carrier concentration and consequently the marked decrease in electrical resistance when annealed at the higher temperatures that are at 500oC and 900oC (i.e, 773 and 1173 K). In general, the obtained films with optimized experimental conditions of as- and post-fabrication can be used for thermoelectric applications.


2003 ◽  
Vol 766 ◽  
Author(s):  
Hang Hu ◽  
Chunxiang Zhu ◽  
Y. F. Lu ◽  
Y. H. Wu ◽  
T. Liew ◽  
...  

AbstractThin films of HfO2 high-κ dielectric have been prepared by pulsed-laser deposition (PLD) at various deposition conditions. X-ray diffraction (XRD), atomic force microscopy (AFM), and secondary ion mass spectroscopy (SIMS) were used to characterize the deposited films. Experimental results show that substrate temperature has little effect on the stoichiometry, while deposition pressure plays an important role in determining the ratio of Hf and O. The electrical properties of HfO2 Metal-Insulator-Metal (MIM) capacitors were investigated at various deposition temperatures. It is shown that the HfO2 (56 nm) MIM capacitor fabricated at 200 oC shows an overall high performance, such as a high capacitance density of ∼3.0 fF/νm2, a low leakage current of 2x10-9 A/cm2 at 3 V, etc. All these indicate that the HfO2 MIM capacitors are very suitable for use in Si analog circuit applications.


2013 ◽  
Vol 740-742 ◽  
pp. 942-945 ◽  
Author(s):  
Fortunato Pezzimenti ◽  
Salvatore Bellone ◽  
Francesco Giuseppe Della Corte ◽  
Roberta Nipoti

The steady state characteristics of a normally-off 4H-SiC Bipolar Mode FET (BMFET) with a low on-resistance are investigated in a wide range of currents and temperatures by means of an intensive numerical simulation study which clarifies what are the main design constraints. Specific physical models and parameters strictly related to the presently available 4H-SiC technology are carefully taken into account. A drain forward current density up to 500 A/cm2, a specific on-resistance lower than 2 mΩ∙cm2 and a current gain in the order of a few tens are calculated. The blocking voltage is in excess of 1.3 kV with a low leakage current. These results are compared with the experimental data measured in the same test conditions of another SiC power device already introduced to the market.


2005 ◽  
Vol 483-485 ◽  
pp. 953-956 ◽  
Author(s):  
Tetsuya Hayashi ◽  
Hideaki Tanaka ◽  
Yoshio Shimoida ◽  
Satoshi Tanimoto ◽  
Masakatsu Hoshi

We demonstrate a new high-voltage p+ Si/n- 4H-SiC heterojunction diode (HJD) by numerical simulation and experimental results. This HJD is expected to display good reverse recovery because of unipolar action similar to that of a SiC Schottky barrier diode (SBD) when forward biased. The blocking voltage of the HJD is almost equal to the ideal level in the drift region of n- 4H-SiC. In addition, the HJD has the potential for a lower reverse leakage current compared with the SBD. A HJD was fabricated with p+-type polycrystalline silicon on an n--type epitaxial layer of 4H-SiC. Measured reverse blocking voltage was 1600 V with low leakage current. Switching characteristics of the fabricated HJD showed nearly zero reverse recovery with an inductive load circuit.


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