High-Speed Data Acquisition System Based on FPGA in Missile-Borne Test System

2013 ◽  
Vol 333-335 ◽  
pp. 452-459 ◽  
Author(s):  
Ming Yu Zhou ◽  
Xuan Zhou ◽  
Guang Yu Zheng ◽  
Shu Sheng Peng
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Large Scale ◽  
Sampling Rate ◽  
Data Acquisition System ◽  
Test System ◽  
Acquisition System ◽  
Nand Flash ◽  
High Speed Data Acquisition ◽  
High Speed Data

In this paper, a high-speed data acquisition system based on FPGA is introduced, which has three different channels with one 5Msps sampling rate and 3×256Mb NAND FLASH. This system is controlled by a large scale FPGA chip from Xilinx Inc., XC3S500E-4FG320C. The collected data are first stored in nonvolatile flash on this fuse in-orbit and imported into a USB disk after down-falling. The main hardware and software design of each module are introduced in detail. Experiment results are shown in the final chapter.

Design and Implementation of Data Acquisition System Based on FPGA and High-Speed AD

2014 ◽  
Vol 556-562 ◽  
pp. 1515-1519 ◽  
Author(s):  
Zhi Li ◽  
Da Hua Chen
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Analog Channel ◽  
Data Output ◽  
High Speed Data Acquisition ◽  
System Data ◽  
High Speed Data ◽  
To Receive

High speed analog signals output by test object in the field of testing and controlling is typical. This paper designed a high-speed AD data acquisition system responding to this situation. In the design of the system, data is first conditioned by the analog channel. FPGA is then employed to receive, decelerate, reorganize and store the high-speed LVDS data output by AD. Data is displayed in computer after being collected by ARM from FGPA. Real circuit designing demonstrated that the high-speed data acquisition system of AD based on 100M bandwidth of analog channel is workable.

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