Study and Design of Image Pre-Processing System Based on FPGA

2012 ◽  
Vol 482-484 ◽  
pp. 200-205
Author(s):  
Jin Tong Li ◽  
Xiao Jie Duan

The high speed of image processing is required in the real-time image processing system. To improve the image processing speed, it is mainly implemented by hardware. This thesis constructs an image preprocessing system based on FPGA. Several typical image preprocessing algorithms, such as fast median filter, mean filter, Gaussian filter, Laplacian and Sobel operator edge filters, are implemented in the system. In the process of the system design, the characteristics and requirements of the image-processing implemented by hardware are fully considered. The parallel attribute insiding the image algorithm is effectively dug and the pipeline structure is adopt. All mentioned above are useful to optimize and improve the algorithms, reduce the hardware consumption and raise speed of image processing.

2014 ◽  
Vol 971-973 ◽  
pp. 1454-1458
Author(s):  
Lei Qu ◽  
Yan Tian ◽  
Jun Liu

For real time target detection, identification and tracking in high frame rates, large field of view images, a real-time image processing system is designed. A TMS320C6678 DSP runs as the chief arithmetic processor of this system and FPGA as the secondary controller. C6678 is compared with the same series C6414 in image compression algorithm test. Experimental results show that the new system has a more effective construct, and higher reliability, and can provide a platform for the new high-speed image processing.


2014 ◽  
Vol 989-994 ◽  
pp. 2273-2277
Author(s):  
Heng Zhang ◽  
Min Gao ◽  
Hai Long Ren

Median filter is a very effective method of non-linear smoothing filtering. However, the data ordering for traditional median filtering (TMF) is very time-consuming and hardly satisfy real-time image processing. This article proposes a kind of fast median filtering algorithm based on grey histogram, the filter seeks the median through the grey histogram of mask window, not the numeric sort, which decreases the comparison times. Moreover, the update of histogram by using the overlap of mask window increases the arithmetic processing speed. Meanwhile, in the proposed algorithm, the two-level self-adapting threshold comparison, with a higher precision of detection, is used to implement the inspection of noise point and improve the image quality and increase the signal-noise ratio by processing the noise point and non-noise point respectively. The experiments by matlab simulation can prove the availability of this algorithm.


2012 ◽  
Vol 6-7 ◽  
pp. 659-664
Author(s):  
En Shun Kang ◽  
Yu Xi Zhao

Traditional median filter algorithm has the long processing time, which goes against the real-time image processing. According to its shortcomings, this paper puts forward the rapid median filter algorithm, and uses DE2 board of the company called Altera to do the realization on FPGA (CycloneII 2C35). The experimental results show that the image pre-processing system is able to complete a variety of high-level image algorithms in milliseconds, and FPGA's parallel processing capability and pipeline operations can dramatically improve the speed of image processing, so the FPGA-based image processing system has broad prospects for development.


2011 ◽  
Vol 179-180 ◽  
pp. 257-263
Author(s):  
Biao Zhang ◽  
Yue Huan Wang

It is double-buses modularized structure with the combination of system control bus and high speed image data bus which is put forward in this paper. Moreover, the management and distribution of image data bus and the design of system reset procedure are elaborated through which a kind of practical real-time image processing system with the strongest adaptability and capability for structure programming and system expansion. The computing capability in infrared test of small target is greatly improved which is verified in tri DSP model system. According to complex image processing task, through the adjustment of parallel structure of image processing algorithm, the higher parallel efficiency can be realized. So to say, the system structure has a great adjustment to algorithm parallel structure and can be successfully used as a platform for universal real-time image processing.


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