Block aligner: fast and flexible pairwise sequence alignment with SIMD-accelerated adaptive blocks

Background: The Smith-Waterman-Gotoh alignment algorithm is the most popular method for comparing biological sequences. Recently, Single Instruction Multiple Data methods have been used to speed up alignment. However, these algorithms have limitations like being optimized for specific scoring schemes, cannot handle large gaps, or require quadratic time computation. Results: We propose a new algorithm called block aligner for aligning nucleotide and protein sequences. It greedily shifts and grows a block of computed scores to span large gaps within the aligned sequences. This greedy approach is able to only compute a fraction of the DP matrix. In exchange for these features, there is no guarantee that the computed scores are accurate compared to full DP. However, in our experiments, we show that block aligner performs accurately on various realistic datasets, and it is up to 9 times faster than the popular Farrar's algorithm for protein global alignments. Conclusions: Our algorithm has applications in computing global alignments and X-drop alignments on proteins and long reads. It is available as a Rust library at https://github.com/Daniel-Liu-c0deb0t/block-aligner.

Parallel Privacy-Preserving Shortest Path Algorithms

In this paper, we propose and present secure multiparty computation (SMC) protocols for single-source shortest distance (SSSD) and all-pairs shortest distance (APSD) in sparse and dense graphs. Our protocols follow the structure of classical algorithms—Bellman–Ford and Dijkstra for SSSD; Johnson, Floyd–Warshall, and transitive closure for APSD. As the computational platforms offered by SMC protocol sets have performance profiles that differ from typical processors, we had to perform extensive changes to the structure (including their control flow and memory accesses) and the details of these algorithms in order to obtain good performance. We implemented our protocols on top of the secret sharing based protocol set offered by the Sharemind SMC platform, using single-instruction-multiple-data (SIMD) operations as much as possible to reduce the round complexity. We benchmarked our protocols under several different parameters for network performance and compared our performance figures against each other and with ones reported previously.

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing

<div>Data movement between processing and memory is</div><div>the root cause of the limited performance and energy</div><div>efficiency in modern von Neumann systems. To</div><div>overcome the data-movement bottleneck, we present</div><div>the memristive Memory Processing Unit (mMPU)—a</div><div>real processing-in-memory system in which the computation is done directly in the</div><div>memory cells, thus eliminating the necessity for data transfer. Furthermore, with its</div><div>enormous inner parallelism, this system is ideal for data-intensive applications that are</div><div>based on single instruction, multiple data (SIMD)—providing high throughput and</div><div>energy-efficiency.</div>

Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing

<div>Data movement between processing and memory is</div><div>the root cause of the limited performance and energy</div><div>efficiency in modern von Neumann systems. To</div><div>overcome the data-movement bottleneck, we present</div><div>the memristive Memory Processing Unit (mMPU)—a</div><div>real processing-in-memory system in which the computation is done directly in the</div><div>memory cells, thus eliminating the necessity for data transfer. Furthermore, with its</div><div>enormous inner parallelism, this system is ideal for data-intensive applications that are</div><div>based on single instruction, multiple data (SIMD)—providing high throughput and</div><div>energy-efficiency.</div>

abPOA: an SIMD-based C library for fast partial order alignment using adaptive band

SummaryPartial order alignment, which aligns a sequence to a directed acyclic graph, is now frequently used as a key component in long-read error correction and assembly. We present abPOA (adaptive banded Partial Order Alignment), a Single Instruction Multiple Data (SIMD) based C library for fast partial order alignment using adaptive banded dynamic programming. It can work as a stand-alone multiple sequence alignment and consensus calling tool or be easily integrated into any long-read error correction and assembly workflow. Compared to a state-of-the-art tool (SPOA), abPOA is up to 15 times faster with a comparable alignment accuracy.Availability and implementationabPOA is implemented in C. A stand-alone tool and a C/Python software interface are freely available at https://github.com/yangao07/[email protected] or [email protected]

Design of Programmable Pixel Shader Computing Unit

With increased focus on improved Graphics, the gaming industries for computer and mobile devices requires more complex graphical algorithms, which in need of better computational resources. In general graphical computation requires more computational units, which will be major constraint in mobile devices as it demand for more power. In order to develop such efficient computational units, one need to focus on the Graphical pipeline to have better visual effects. In this paper design of programmable Pixel shader computing unit is discussed. In GPU, the Pixel shaders are used to process and manipulate the each pixel. Also the Pixel Shaders are used to provide final coloring to the processed data. Here the programmable Pixel shader computing unit design is discussed, which help the programmer to add his own code for achieving better visual effects or results. The possible Instructions of Pixel shader are designed using Verilog HDL. The SIMD(Single Instruction Multiple Data) concept is adopted for the designing of each instruction.