Adaptive Data-Transition Decision Feedback Equalizers For High-Speed Serial Links

This dissertation investigates adaptive decision feedback equalizers for high-speed serial data links.<div>An adaptive data-transition decision feedback equalizer (DT-DFE) was developed. The DT-DFE boosts the eye-opening of the high-frequency components of data without attenuating their low-frequency counterparts. Reference voltages were obtained by transmitting consecutive 1s and 0s and measuring the output of the continuous-time linear equalizer using a pair of successive approximation register analog-to-digital converters in a training phase. It uses loop unrolling to detect data transitions, activate tap-tuning, launch DFE, and combat timing constraints. The performance of the DT-DFE and its advantages over commonly used data-state DFE were validated using the schematic-level simulation results of 5 Gbps backplane links.<br></div><div>A new adaptive DT-DFE with edge-emphasis (EE) taps and raised references was developed. Loop-unrolling was further developed for DT-DFE with EE-taps. The reference voltages were raised beyond that set by the low-frequency components of data to increase vertical eye-opening. Clock and data recovery was performed using 4x oversampling. The DT-DFE was validated using the schematiclevel simulation results of 10 Gbps backplane links.<br></div><div>A pre-skewed bi-directional gated delay line (BDGDL) bang-bang frequency difference-to-digital converter and a BDGDL integrating frequency difference-todigital converter (iFDDC) were proposed for clock and data recovery. Both frequency difference detectors feature all-digital realization, low power consumption, and high-speed operation. The built-in integration of iFDDC results in a zero static frequency error and the first-order noise-shaping of the quantization errors of the BDGDL and digitally-controlled oscillators. Their effectiveness was validated using schematic-level simulation results of 5-GHz frequency-locked loops.<br></div><div>All systems validating the proposed adaptive DFE and frequency-difference detectors were designed in TSMC’s 65 nm CMOS technology and analyzed using Spectre from Cadence Design Systems. <br></div>

Adaptive Data-Transition Decision Feedback Equalizers For High-Speed Serial Links

This dissertation investigates adaptive decision feedback equalizers for high-speed serial data links.<div>An adaptive data-transition decision feedback equalizer (DT-DFE) was developed. The DT-DFE boosts the eye-opening of the high-frequency components of data without attenuating their low-frequency counterparts. Reference voltages were obtained by transmitting consecutive 1s and 0s and measuring the output of the continuous-time linear equalizer using a pair of successive approximation register analog-to-digital converters in a training phase. It uses loop unrolling to detect data transitions, activate tap-tuning, launch DFE, and combat timing constraints. The performance of the DT-DFE and its advantages over commonly used data-state DFE were validated using the schematic-level simulation results of 5 Gbps backplane links.<br></div><div>A new adaptive DT-DFE with edge-emphasis (EE) taps and raised references was developed. Loop-unrolling was further developed for DT-DFE with EE-taps. The reference voltages were raised beyond that set by the low-frequency components of data to increase vertical eye-opening. Clock and data recovery was performed using 4x oversampling. The DT-DFE was validated using the schematiclevel simulation results of 10 Gbps backplane links.<br></div><div>A pre-skewed bi-directional gated delay line (BDGDL) bang-bang frequency difference-to-digital converter and a BDGDL integrating frequency difference-todigital converter (iFDDC) were proposed for clock and data recovery. Both frequency difference detectors feature all-digital realization, low power consumption, and high-speed operation. The built-in integration of iFDDC results in a zero static frequency error and the first-order noise-shaping of the quantization errors of the BDGDL and digitally-controlled oscillators. Their effectiveness was validated using schematic-level simulation results of 5-GHz frequency-locked loops.<br></div><div>All systems validating the proposed adaptive DFE and frequency-difference detectors were designed in TSMC’s 65 nm CMOS technology and analyzed using Spectre from Cadence Design Systems. <br></div>

Coherent Detection of Non-Orthogonal Spectrally Efficient Multicarrier Signals Using a Decision Feedback Algorithm

Introduction. Spectrally efficient frequency division multiplexing (SEFDM) is a promising technology for improving spectral efficiency. Since SEFDM signals transmitted on subcarriers are not orthogonal, interchannel interference occurs due to the mutual influence of signals transmitted on adjacent subcarriers. Algorithms for receiving SEFDM signals can be distinguished into element-by-element coherent detection and maximum-likelihood sequence estimation (MLSE). The former method, although being simpler, is characterized by a low bit error rate performance. The latter method, although providing for a higher energy efficiency, is more complicated and does not allow high absolute message rates.Aim. To consider a trade-off solution to the problem of coherent detection of SEFDM signals under the condition of significant interchannel interference, namely, the use of an iterative algorithm of element-by-element processing with decision feedback at each subcarrier frequency.Materials and methods. Analytical expressions for the operation of a demodulator solver were derived. A simulation model for transmission of SEFDM signals was built in the MatLab environment, including element-by-element detection with decision feedback.Results. The simulation results confirmed the efficiency of the proposed algorithm. For error probabilities p =102…103, the energy gains reach values from 0.2 to 7.5 dB for different values of the non-orthogonal subcarrier spacing. At the same time, the efficiency of the detection algorithm with decision feedback turns out to be significantly lower than that when using the detection algorithm MLSE.Conclusion. The proposed detection algorithm can be used in future generations of mobile communications, which require high transmission rates. By reducing the computational complexity of the algorithm, it is possible to provide for a lower power consumption of mobile devices.