gate stack
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Silicon ◽  
2022 ◽  
Author(s):  
Saradiya Kishor Parija ◽  
Sanjit Kumar Swain ◽  
Sudhansu Mohan Biswal ◽  
Sarosij Adak ◽  
Pradipta Dutta

2022 ◽  
Vol 43 (1) ◽  
pp. 013101
Author(s):  
Lixing Zhou ◽  
Jinjuan Xiang ◽  
Xiaolei Wang ◽  
Wenwu Wang

Abstract Ge has been an alternative channel material for the performance enhancement of complementary metal–oxide–semiconductor (CMOS) technology applications because of its high carrier mobility and superior compatibility with Si CMOS technology. The gate structure plays a key role on the electrical property. In this paper, the property of Ge MOSFET with Al2O3/GeO x /Ge stack by ozone oxidation is reviewed. The GeO x passivation mechanism by ozone oxidation and band alignment of Al2O3/GeO x /Ge stack is described. In addition, the charge distribution in the gate stack and remote Coulomb scattering on carrier mobility is also presented. The surface passivation is mainly attributed to the high oxidation state of Ge. The energy band alignment is well explained by the gap state theory. The charge distribution is quantitatively characterized and it is found that the gate charges make a great degradation on carrier mobility. These investigations help to provide an impressive understanding and a possible instructive method to improve the performance of Ge devices.


2021 ◽  
Vol 127 (12) ◽  
Author(s):  
Chetlal Mahto ◽  
Prithvi Raj Sharma ◽  
Siddharth Kumar Nishad ◽  
Shubham Kumar ◽  
Navaneet Kumar Singh ◽  
...  

Author(s):  
Takamasa KAWANAGO ◽  
Takahiro Matsuzaki ◽  
Ryosuke Kajikawa ◽  
Iriya Muneta ◽  
Takuya HOSHII ◽  
...  

Abstract In this paper, we report on the device concepts for high-gain operation of a tungsten diselenide (WSe2) complementary metal-oxide-semiconductor (CMOS) inverter at a low power supply voltage (Vdd), which was realized by developing a doping technique and gate stack technology. A spin-coating with a fluoropolymer and poly(vinyl alcohol) (PVA) results in the doping of both electrons and holes to WSe2. A hybrid self-assembled monolayer (SAM)/aluminum oxide (AlOx) gate dielectric is viable for achieving high gate capacitance and superior interfacial properties. By developing the doping technique and gate stack technology, we experimentally realized a high gain of 9 at Vdd of 0.5 V in the WSe2 CMOS inverter. This study paves the way for the research and development of transition metal dichalcogenides (TMDC)-based devices and circuits.


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