DbOBS: Dual Buffered Switch for Variable Optical Bursts in Future Datacenters

Modern data-driven applications pose stringent requirements of high bandwidth, ultra-low-latency, low-powered, and scalable interconnections among switches and routers in data-centers. To address these demands, electronic switching is not a viable choice due to bandwidth and computing bottlenecks. Thus, researchers explored effective optical switch design principles for next-generation data-centers. In optical switches, data aggregates in the form of optical bursts (OB) at ultra-high speeds. In the case of OB contention, solutions are proposed by researchers to store OB as recirculating patterns in fiber delay lines (FDL) with induced optical delay. However, due to variable burst length, it is not possible to measure slot delay length, thus storage of contending bursts is not possible at intermediate core switches. Motivated from the aforementioned discussions, in this paper, we propose a switch design DbOBS, that is capable to store variable OB during contention slots. DbOBS estimates mean burst length, and possible deviation from mean length to minimize burst loss. The considered switch design is validated through parameters like-burst length estimation, over-reservation, and waiting time. For network-layer simulations, poison arrivals of data bursts are considered as packetized units. The packets are sent through Monte-Carlo arrivals and burst loss probability (BLP) is estimated at various input load conditions and buffer sizes. DbOBS achieves a BLP in order of 10-4 at load ≈ 0.8, and buffer-size of 50, and burst length of L = 5, that outperforms the traditional switch designs.

Writing analytics across essay tasks with different cognitive load demands

Essay tasks are a widely used form of assessment in higher education. Writing analytics can assist with challenges related to using essay tasks at scale and to identifying different issues in academic integrity. In this paper, we combined two techniques to investigate how students’ writing analytics varied across essay tasks with different cognitive load, considering both their typing behavior (i.e., writing process) and writing style (i.e., writing product). We also examined their relationship across these essay tasks. Findings showed that writing processes change across tasks with different cognitive load: when cognitive load increases, the interword intervals (indicator of planning and/or reviewing processes) increased, the burst length (indicator of translation processes) decreased, and the number of revisions per minute (indicator of reviewing processes) decreased. In contrast to the relation between the writing process and cognitive load, the relation between the writing product and cognitive load was found less clear. The results showed small and mixed effects of the tasks differing in cognitive load on the different writing product metrics. Hence, although the writing product follows from the writing process, the relation between cognitive load and the writing product and process appears to be less straightforward.

Written Language Bursts Mediate the Relationship Between Transcription Skills and Writing Performance

It is established that transcription skills (handwriting and spelling) constrain children’s writing. Yet, little is known about the mechanism underlying this relationship. This study examined the mediating role of bursts and pauses on the link between transcription skills and writing fluency or text quality. For that, 174 second graders did the alphabet task and wrote a story using HandSpy. Path analyses indicated that writing fluency and text quality models were excellent descriptions of the data, with 80% and 46% of explained variance, respectively. Results showed that handwriting and spelling influenced writing fluency only indirectly via burst length and short pauses duration (full mediation); and that whereas only handwriting contributed to text quality directly, both handwriting and spelling contributed to text quality indirectly, via burst length (partial mediation). These findings suggest that better transcription skills allow students to write more words without pausing, which in turn results in more fluent and better writing.

Drop-Burst Length Evaluation of Urban VANETs

Networks performance is traditionally evaluated using packet delivery ratio (PDR) and latency (delay). We propose an addition mechanism the drop-burst length (DBL). Many traffic classes display varying application-level performance according to the pattern of drops, even if the PDR is similar. In this paper we study a number of VANET scenarios and evaluate them with these three metrics.Vehicular Ad-hoc Networks (VANETs) are an emerging class of Mobile Ad-hoc Network (MANETs) where nodes include both moving vehicles and fixed infrastructure. VANETs aim to make transportation systems more intelligent by sharing information to improve safety and comfort. Efficient and adaptive routing protocols are essential for achieving reliable and scalable network performance. However, routing in VANETs is challenging due to the frequent, high-speed movement of vehicles, which results in frequent network topology changes.Our simulations are carried out using NS2 (for network traffic) and SUMO (for vehicular movement) simulators, with scenarios configured to reflect real-world conditions. The results show that OLSR is able to achieve a best DBL performance and demonstrates higher PDR performance comparing to AODV and GPSR under low network load. However, with GPSR, the network shows more stable PDR under medium and high network load. In term of delay OLSR is outperformed by GPSR.

DYNAMIC PULSE INTEGRATING CIRCUIT FOR INFRARED RECEIVERS

In this paper, a frequency-tunable dynamic pulse integrating circuit for infrared receivers is presented. The proposed circuits possess many advantages, such as high sensitivity, high immunity against disturbances, simple structure, and so on. This integrator not only defines a minimum time for the burst length and a minimum time between the bursts, but also achieves the same minimum number of pulses in different frequencies. The frequency-tunable dynamic pulse integrator is a combined structure of the center frequency modulation and a new type of pulse integrator. The center frequency modulation is implemented by using zener zap anti-fuse trim and a second-order band-pass filter (BPF) with bipolar operational transconductance amplifier (OTA) cell. The integrator also describes the characteristics of variable-error tolerance to prevent the output envelope error due to the lack of individual pulses. The results of simulation are shown that the center frequency is available from 33 to 40 kHz and 56 kHz in typical application by Cadence respectively. Moreover, the minimum burst length is 10 pulses and minimum bursts gap time is 14 pulses in typical application.